Flash Operation Error On Dual Core Application

[SpeedyGonzalesss]

Hello,

I am using i.mx RT1176 mcu and mcuxpresso ide.

In my application, xip is active. In the project where the M7 processor is the master, when the M4 processor wants to erase and then write to an area in the external nor flash (the M7 processor does not perform any read/write/erase operations to this area), the M7 processor crashes and resets. Before starting the flash operations, the M4 processor makes a request to the M7 processor that it will start operations via MU and then does not perform any operations until it receives a response. Why might I be encountering this problem? How can I prevent this problem in this scenario?

Best Regards,

[Habib_MS]

Hello @SpeedyGonzalesss,
In the case that you are currently using XIP mode you cannot Read/write the same FLASH, this because the XIP needs to obtain the next instruction from the flash where is continuously taking the bus. For this reason, if the cortex M4 wants to take this bus will be a coalition

BR
Habib.

[SpeedyGonzalesss]

Hello @Habib_MS ,

I tried to make XIP mode offline for testing. But I am having problems. I change the following values ​​from 1 to 0

XIP_BOOT_HEADER_DCD_ENABLE

XIP_BOOT_HEADER_ENABLE

After these changes, the treasures are as follows:

After this, i activated the "Link application to RAM" option:

I make these changes in the M4 project, compile and flash, but I cannot run the code. What could be the problem?

[Habib_MS]

Hello @SpeedyGonzalesss,
In order to support you better, can you provide me the example where you are making the changes?

Also, in the SDK (version 2.16) example called "hello_world_cm4" the code was linked in RAM, as shown in the window called "image info":

In this example the cortex M7 project is currently using XIP, this is the project that must be linked to RAM with the purpose of freeing the bus to read/write the FLASH.
I highly recommend see this example that could be helpful.
BR
Habib

[SpeedyGonzalesss]

Hello,

I use my custom project. In my project, M4 runs in RAM while M7 uses XIP. Before making the changes I mentioned above, after compiling the project, 1 percent of the flash was shown to be used, but after making the changes, Flash is not shown to be used.

Best Regards,

[Habib_MS]

Hello again @SpeedyGonzalesss,
If you link the Cortex M7 to RAM, can you read/write the FLASH?
BR
Habib.

[SpeedyGonzalesss · Accepted solution]

I had to move the IVT block before copying it to RAM. This is how I was able to do it. Thank you