FLEXSPI2 Pin MUX confusion about RT1060 and RT1064

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FLEXSPI2 Pin MUX confusion about RT1060 and RT1064

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BlackTurbo
Contributor III

Hi, I have a question about the FlexSPI2 pin mux for RT1060 and RT1064.

In RT1060 and RT1064 reference manual, there are Muxing options table (Table 10) to reference, you can also find a table (Table 44) in AN12290 for Pin mux changes from RT1060 to RT1064, but the pin muxing described in AN12290 are not consistent with the table in the reference manuals, actually they're completely opposite. So which is the correct pin mux table(s)? 

@jeremyzhou;@kerryzhou 

RT1060: 

zhihui_zhu_0-1614237746693.png

RT1064:

zhihui_zhu_1-1614237803175.png

But in AN12290, Migration Guide from RT1060 to RT1064:

zhihui_zhu_2-1614238221214.png

 

 

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jeremyzhou
NXP Employee
NXP Employee

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
1) So which is the correct pin mux table(s)?
-- Table 4 is wrong, as the i.MX RT1060 doesn't have the GPIO_SPI_Bx_xxx pins, in further, you can learn more information about the FlexSPI's pin assignment via the below link.
https://www.cnblogs.com/henjay724/p/12390823.html
Have a great day,
TIC

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jeremyzhou
NXP Employee
NXP Employee

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
1) So which is the correct pin mux table(s)?
-- Table 4 is wrong, as the i.MX RT1060 doesn't have the GPIO_SPI_Bx_xxx pins, in further, you can learn more information about the FlexSPI's pin assignment via the below link.
https://www.cnblogs.com/henjay724/p/12390823.html
Have a great day,
TIC

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mjbcswitzerland
Specialist V

Hi

I would like to add to the discussion since the i.MX RT 1064 user's manual is also inconsistent with regards to FLEXSPI2 pins on GPIO_EMC.

For example if one takes FLEXSPI2_A_DATA0 table 10-1 shows it being available on three pins, including GPIO_EMC_26:

mjbcswitzerland_2-1617021817801.png

 

But in the IOMUX section ALT8 is not given as an option:

mjbcswitzerland_3-1617021949898.png


Whereas the i.MX RT 1062 has the register IOMUXC_FLEXSPI2_IPP_IND_IO_FA_BIT0_SELECT_INPUT to select which of the three inputs is taken there is no such register in the i.MX RT 1064, suggesting that the input(s) doesn't actually even exist.

Which parts of the i.MX RT 1064's user's manual are correct and which are wrong with regards to FLEX_SPI2?

Regards

Mark

 

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jeremyzhou
NXP Employee
NXP Employee

Hi,
Thanks for your reply.
1) Which parts of the i.MX RT 1064's user's manual are correct and which are wrong with regards to FLEX_SPI2?
-- Actually, i.MX RT1064 inherit from the i.MX RT1060 series' feature, so the FLEXSPI2_A_DATA0 should be able to assign to GPIO_EMC_26, however, for i.MX RT1064 needs the FLEXSPI2_A_DATA0 assign to GPIO_SPI_B0_02 to make sure boot from internal flash.
So it hides IOMUXC_FLEXSPI2_IPP_IND_IO_FA_BIT0_SELECT_INPUT register to make sure it boots from the internal flash.
Have a great day,
TIC

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