FLEXSPI_ReadBlocking() hangs waiting for FIFO to clear up

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FLEXSPI_ReadBlocking() hangs waiting for FIFO to clear up

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mjpovi
Contributor III

For MIMXRT1064,  In performing a QSPI / FLEXSPI read operation from a NOR flash device with number of bytes to read greater than 48K or 64K or larger, FLEXSPI_ReadBlocking() hangs inside its while loop waiting for room in the FIFO (code snipped from SDK, below).  

My question is, is there a limit to the number of bytes to read via FLEXSPI due to the FIFO ?  If yes, what is that value and is it configurable ?

/* Send data buffer */
while (0U != size)
{
if (size >= 8U * rxWatermark)
{
/* Wait until there is room in the fifo. This also checks for errors. */ <<<<< Runs here 'forever'
while (0U == ((status = base->INTR) & (uint32_t)kFLEXSPI_IpRxFifoWatermarkAvailableFlag))
{
result = FLEXSPI_CheckAndClearError(base, status);

 

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jay_heng
NXP Employee
NXP Employee

RX FIFO size is 128bytes. You should never trigger a read command with data size larger than IP RX FIFO size. because most flash doesn't support SCLK stop feature.

SCLK_Stop.PNG

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993 次查看
jay_heng
NXP Employee
NXP Employee

RX FIFO size is 128bytes. You should never trigger a read command with data size larger than IP RX FIFO size. because most flash doesn't support SCLK stop feature.

SCLK_Stop.PNG

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mjpovi
Contributor III
Thanks! If DMA is used instead of IP for Flexspi transfer, is there another limit ?
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