Hi,
I am testing UART Flex IO in low power run mode in 1015RT.
I use the SDK sample and combine UART Flex IO sample.
Please see my attachment.
My code hang up when UART_FlexIO_Init,
As I know, Flex IO can use in low power mode.
What is the correct way to use UART_FlexIO in low power run mode?
Any limitation?
Or any suggestion?
Thanks
Ken
Hi Ken Su,
A lot of talks with an internal side, it turns out the document error.
1. PLLs for FlexIO is powered down under low power run mode
Please check the RT1050RM, RT1015RM still didn't update it, AN12345 is also incorrect, already report it.
2. pll3_sw_clk_sel =1 option should not be used, That bit is intended for NXP internal test and uses an input clock on a pin instead of the internal PLL bypass clock. So it is a different kind of bypass than what is implied in the description.
This part will be removed from the document.
3. The FlexIO module allows for functional clock to run in low power modes (and really this statement is a carry over from Kinetis), but the SOC integration on RT10xx parts does not.
I also suggest our related department to add peripheral states to the low power mode definitions table.
In conclusion, FlexIO module can't be used under low power run mode.
Sorry for the inconvenience we bring you.
If you still have questions about it, please kindly let me know.
Kerry
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Hi Ken Su ,
Please check the RT1015 power consumption application note at first:
https://www.nxp.com/docs/en/application-note/AN12345.pdf
Then check your code, your code FLEXIO is using the usbPLLclk, but from the application note, you can find in the low power run mode, all the PLLS are powered down, that's why you hang up there.
So, you need to check other clock source for flexio which still works under low power run mode.
Wish it helps you!
If you still have questions about it, please kindly let me know.
Kerry
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Hi Kerry
Thanks for your remind,
Frankly speaking, I don't know very well about the CLK setting,
Could you let me known how to use FlexIO in low power run mode?
I think it need to change FLEXIO1_CLK_SEL to OSC so that I can use FlexIO UART in low power run.
Is it possible?
Regards
Ken
Hi Ken Su,
Thanks for your updated information.
Today, I do the testing, bypass the PLL3, and select the FlexIO1 clock source as PLL2_SW_CLK, PLL2_SW_CLK bypass the PLL3, and from the 24Mhz directly, but it seems still have an issue when I enable the FlexIO1 clock gate and access the FLEXIO1 register.
Anyway, I will help you to check it internally.
If I get valuable information, I will also let you know.
Please keep the patient, thanks.
Best Regards,
Kerry
Hi Ken Su,
A lot of talks with an internal side, it turns out the document error.
1. PLLs for FlexIO is powered down under low power run mode
Please check the RT1050RM, RT1015RM still didn't update it, AN12345 is also incorrect, already report it.
2. pll3_sw_clk_sel =1 option should not be used, That bit is intended for NXP internal test and uses an input clock on a pin instead of the internal PLL bypass clock. So it is a different kind of bypass than what is implied in the description.
This part will be removed from the document.
3. The FlexIO module allows for functional clock to run in low power modes (and really this statement is a carry over from Kinetis), but the SOC integration on RT10xx parts does not.
I also suggest our related department to add peripheral states to the low power mode definitions table.
In conclusion, FlexIO module can't be used under low power run mode.
Sorry for the inconvenience we bring you.
If you still have questions about it, please kindly let me know.
Kerry
-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!
- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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