ERR051091 applicability to the IMXRT117x series

[transistor32]

In the IMXRT1170 Errata, there is ERR051091 which concerns leakage current of the ADC.

1. Does this apply to all chips in the IMXRT117x series such as IMXRT1172, IMXRT117F etc., or only IMXRT1170?

2. Does this apply to all silicon revisions? (Not sure if there's been any revisions)

3. How do you "configure the pads for high-range mode operation" when using the SDK drivers? I couldn't see anything in fsl_lpadc.c or in the pin planner, maybe I missed it?

[diego_charles]

Hi @transistor32 

Many thanks for your patience. 

Regarding your questions. 

1 Yes, currently  this applies to all i.MX RT1170 family chips. unless specified.

2 Yes currently this applies to all i.MX RT1170 family chip sillicon revisions, unless specified.

3 Currently, the pad range mode needs to be set manually, by directly making a  mask to the related  pad register.  There are macros in the MIMXRT1176_cm7.h, to enable voltage range selection. Below an example.

#define IOMUXC_GPR_GPR69_GPIO_AD1_LOW_RANGE_MASK (0x100U)
#define IOMUXC_GPR_GPR69_GPIO_AD1_LOW_RANGE_SHIFT (8U)
/*! GPIO_AD1_LOW_RANGE - GPIO_LPSR IO bank supply voltage range selection for GPIO_AD_18 to GPIO_AD_35 */
#define IOMUXC_GPR_GPR69_GPIO_AD1_LOW_RANGE(x)   (((uint32_t)(((uint32_t)(x)) << IOMUXC_GPR_GPR69_GPIO_AD1_LOW_RANGE_SHIFT)) & IOMUXC_GPR_GPR69_GPIO_AD1_LOW_RANGE_MASK)

* From  12.4.4.65 GPR69 General Purpose Register (GPR69) section of IMXRT1170RM.

Best regards, 

Diego