About IMXRT1010 RAM available

[LuigiV]

I'm using the IMXRT1010 EVM to develop a convolution project and I need to have available the maximum size of RAM; compiling and linking my FW I get this error:

"

10:07:50 **** Incremental Build of configuration Debug for project evkmimxrt1010_sai_interrupt_record_playback ****

make -r -j4 all

Building target: evkmimxrt1010_sai_interrupt_record_playback.axf

Invoking: MCU Linker

arm-none-eabi-gcc -nostdlib -Xlinker -no-warn-rwx-segments -Xlinker -Map="evkmimxrt1010_sai_interrupt_record_playback.map" -Xlinker --gc-sections -Xlinker -print-memory-usage -Xlinker --sort-section=alignment -Xlinker --cref -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -T evkmimxrt1010_sai_interrupt_record_playback_Debug.ld -o "evkmimxrt1010_sai_interrupt_record_playback.axf" ./xip/evkmimxrt1010_flexspi_nor_config.o ./xip/fsl_flexspi_nor_boot.o ./utilities/fsl_assert.o ./utilities/fsl_debug_console.o ./utilities/fsl_memcpy.o ./utilities/fsl_str.o ./startup/startup_mimxrt1011.o ./source/MathRoutines.o ./source/sai_interrupt_record_playback.o ./source/semihost_hardfault.o ./drivers/fsl_clock.o ./drivers/fsl_common.o ./drivers/fsl_common_arm.o ./drivers/fsl_gpio.o ./drivers/fsl_lpi2c.o ./drivers/fsl_lpuart.o ./drivers/fsl_sai.o ./device/system_MIMXRT1011.o ./component/uart/fsl_adapter_lpuart.o ./component/lists/fsl_component_generic_list.o ./component/i2c/fsl_adapter_lpi2c.o ./codec/port/wm8960/fsl_codec_wm8960_adapter.o ./codec/fsl_codec_common.o ./codec/fsl_codec_i2c.o ./codec/fsl_wm8960.o ./board/board.o ./board/clock_config.o ./board/pin_mux.o ./CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.o ./CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.o ./CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.o ./CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.o ./CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.o ./CMSIS/NN/Source/SVDFunctions/arm_svdf_s8.o ./CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.o ./CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.o ./CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.o ./CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.o ./CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.o ./CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.o ./CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.o ./CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.o ./CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.o ./CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.o ./CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.o ./CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.o ./CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.o ./CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.o ./CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.o ./CMSIS/NN/Source/NNSupportFunctions/arm_nntables.o ./CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.o ./CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.o ./CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.o ./CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.o ./CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.o ./CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.o ./CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.o ./CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.o ./CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.o ./CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.o ./CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.o ./CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.o ./CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.o ./CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.o ./CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.o ./CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.o ./CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.o ./CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.o ./CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.o ./CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.o ./CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.o ./CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.o ./CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.o ./CMSIS/DSP/Source/TransformFunctions/TransformFunctions.o ./CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.o ./CMSIS/DSP/Source/SupportFunctions/SupportFunctions.o ./CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.o ./CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.o ./CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.o ./CMSIS/DSP/Source/SVMFunctions/SVMFunctions.o ./CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.o ./CMSIS/DSP/Source/QuaternionMathFunctions/QuaternionMathFunctions.o ./CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.o ./CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.o ./CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.o ./CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.o ./CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.o ./CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.o ./CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.o ./CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.o ./CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.o ./CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.o ./CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.o ./CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.o ./CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.o ./CMSIS/DSP/Source/CommonTables/CommonTables.o ./CMSIS/DSP/Source/CommonTables/CommonTablesF16.o ./CMSIS/DSP/Source/BayesFunctions/BayesFunctions.o ./CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.o ./CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.o ./CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.o

c:/nxp/mcuxpressoide_11.8.1_1197/ide/plugins/com.nxp.mcuxpresso.tools.win32_11.8.1.202308071233/tools/bin/../lib/gcc/arm-none-eabi/12.2.1/../../../../arm-none-eabi/bin/ld.exe: evkmimxrt1010_sai_interrupt_record_playback.axf section `.bss' will not fit in region `SRAM_ITC'

c:/nxp/mcuxpressoide_11.8.1_1197/ide/plugins/com.nxp.mcuxpresso.tools.win32_11.8.1.202308071233/tools/bin/../lib/gcc/arm-none-eabi/12.2.1/../../../../arm-none-eabi/bin/ld.exe: region `SRAM_ITC' overflowed by 5108 bytes

Memory region Used Size Region Size %age Used

BOARD_FLASH: 57432 B 16 MB 0.34%

SRAM_ITC: 37876 B 32 KB 115.59%

SRAM_DTC: 2 KB 32 KB 6.25%

SRAM_OC: 0 GB 64 KB 0.00%

NCACHE_REGION: 0 GB 0 GB

collect2.exe: error: ld returned 1 exit status

make[1]: *** [makefile:80: evkmimxrt1010_sai_interrupt_record_playback.axf] Error 1

make: *** [makefile:71: all] Error 2

"make -r -j4 all" terminated with exit code 2. Build might be incomplete.

10:07:51 Build Failed. 4 errors, 0 warnings. (took 1s.94ms)

"

Only the SRAM_ITC is used for data, is there a way to set the environment to have all the SRAM (DTC and OC) available for data ?

Thank you

Luigi

[kerryzhou]

Hi @LuigiV ,

  To your situation, it is easy to resolve, mainly 2 ways:

1. define your related variable to the DTCM or the OCRAM.

You can refer to this document:

https://community.nxp.com/docs/DOC-335283

: Use the keyword “__attribute__”

2. Reallocate your flexRAM, to make your ITCM size larger.

More details, you can refer to this application note:

https://www.nxp.com/docs/en/application-note/AN12077.pdf

You also can refer to my document:

https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/The-RT-speech-recognition-system-based-on-VIT-to...

chapter 5.2 VIT LWIP merger memory is not enough

Wish it helps you!

If you still have question about it, please kindly let me know.

If your question is solved, please help me to mark the correct answer, just to close this case.

Any new issues, welcome to create the new question post, thanks.

Best Regards,

Kerry