what is the JRSDIDR in CAAM.

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what is the JRSDIDR in CAAM.

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Contributor III

Dear NXP team.

I have a "IMX6DQ6SDLSRM_security.pdf" doc file.

- Document Number: IMX6DQ6SDLSRM Rev. 0, 03/2013

Question 1. I can not find what is the  JRSDIDR and what does it mean in the doc file.

     B.2.6 Job Ring Registers

     This section describes registers found in each of the job rings. A functional description of

     the job rings can be found in the “Cryptographic Acceleration and Assurance Module

     (CAAM)” chapter.

     If the job ring is allocated to TrustZone SecureWorld (JRSDIDR TZ=1), then the job ring

     registers associated with this ring may only be written via a bus transaction that has ns=0.

     Transactions with ns=1 for job rings owned by TrustZone SecureWorld will be ignored.

Question 2. Input/Output Ring Base Address Register

     There are each 2 Input/Output Ring Base Address Register .

     - IRBAR0, IRBAR1

     - ORBAR0, ORBAR01

     What is the different of IRBAR0, IRBAR1 and ORBAR0, ORBAR01 ?

     - ex) IRBAR0 is for TrustZone SecureWorld and IRBAR1 is for TrustZone Non-SecureWorld ?

Best regards,

MyungJin Hwang

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Contributor III

I really don't understand it.

2 Job rings mean "input job ring" and "output job ring" right?

and 2 copies of the register is "JR0" "JR1"?

for what, there are 2 copies of the register?

could you explain easily?

Thanks

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Contributor III

Thanks for the reply ...

and Could you explaine about Question 2 as well ?

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NXP TechSupport
NXP TechSupport

Because there are 2 job rings, there are 2 copies of this register.

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NXP TechSupport
NXP TechSupport

Hi MyungJin

please look at sect.1.8.1.4 Job Ring SDID Register (JRSDIDR)

LS1021ASECRM, QorIQ LS1021A Security (SEC) Reference Manual - Reference Manual (REV 0)

http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-arm-processors/qori...

Best regards

igor

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