Hi @rainho,
I hope you are doing well.
One can refer to Table 35-1. MMDC feature summary of the i.MX6ULL Reference Manual.
i.MX6ULL supports density per DDR device of 256 Mbits–8 Gbits with the following column and row
combinations:
• Column size of 8–12 bits
• Row size of 11–16 bits
Thanks & Regards,
Ritesh M Patel