uSDHC bus timing in i.MX6DQ datasheet

[torus1000]

Hi,

I checked the i.MX6DQ datasheet but I couldn't understand the note#4 which attached to the uSDHC bus timing table.

I think hold time is specified and clear as tIH>1.5ns.

Why note#4 added?

note#4: "To satisfy hold timing, the delay difference between clock input and cmd/data input must not exceed 2 ns."

It seems redundant spec for the uSDHC IP or something or obsolete.
Futhermore clock is obviously not input but output always.
I compared to the LS1020A datasheet. There is no such notes.

Can anyone explain me?

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References:
https://www.nxp.com/docs/en/data-sheet/IMX6DQCEC.pdf
https://www.nxp.com/docs/en/data-sheet/IMX6SDLCEC.pdf
https://www.nxp.com/docs/en/data-sheet/IMXRT1050IEC.pdf
https://www.nxp.com/docs/en/data-sheet/MPC8306EC.pdf
...
https://www.nxp.com/webapp/Download?colCode=LS1020A

[igorpadykov · Accepted solution]

Hi torus1000

>It seems redundant spec for the uSDHC IP or something or obsolete.

you are right, seems this is misprint left from older i.MX documentation.

Best regards
igor
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