u-boot-2009.08 seems a typo in board/freescale/mx6q_sabresd/flash_header.S

[wallyyeh]

Hi,all:

   Once again, my boss wanna make a cost down version for our old model which is made from i.MX6Q. this time he want using i.MX6DL instead.

so we can just replace the u-boot and keep the kernel and rootfs, a cost down version will be ready immediately.

    Our old model is using L3.0.35_4.1.0, so I have to re-fill the correct DCD table in u-boot-2009.08/board/freescale/mx6q_sabresd/flash_header.S for i.MX6DL.

and in line 270( which in case CONFIG_MX6DL_DDR3 is defined but CONFIG_DDR_32BIT is not) :

MXC_DCD_ITEM(82, MMDC_P1_BASE_ADDR + 0x404, 0x00011006)    ->  It write to register MMDC2_MAPSR in register address 0x021B4404

    But I check the i.MX6DL for 32 bit in line 148:

MXC_DCD_ITEM(58, MMDC_P0_BASE_ADDR + 0x404, 0x00011006)    ->  It write to register MMDC1_MAPSR in register address 0x021B0404

    also check i.MX6Q in line 382:

MXC_DCD_ITEM(82, MMDC_P0_BASE_ADDR + 0x404, 0x00011006)    ->  It write to register MMDC1_MAPSR in register address 0x021B0404

  So I guess this is just a typo, but I'm not a expert of this. hope freescale staff could help to confirm this typo.

anyone wanna download the u-boot-2009.08, can get it from freescale official site:

L3.0.35_4.1.0_SOURCE_BSP

Wally

[igorpadykov · Accepted solution]

Hi Wally

you are right, this is typo one can refer to attached i.MX6DL, Q

scripts for check.

Best regards

igor

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[angelo_d]

If you use DDR3, port 0 only can be used. So, you have DCD based on sabrelite, not sure what DDR sabre have, but in any case, for DDR3 must be port 0.  Does it work ?

[wallyyeh]

Hi, angelo:

   yes, we use DDR3, and based on board sabreSD. so you mean only MMDC1 should be initialized, right?

the thing confused me is no matter I correct it or not, both can boot i.MX6DL, but I afraid wrong initialization will make our product not stable.