split-mode for dual channel LVDS

[antonyabeepraka]

Hi,

Our custom board module imx8m has SN65DSI84 MIPI DSI to LVDS bridge.

We have configured the CSR register 0x18 as 6f (dual channel , format 1, 24bpp). But we are not getting any display in LVDS (blank screen with backlight glowing).

So we are trying out another way like creating two panel nodes inside mipi_dsi_bridge and using split-mode.

Below is our code from .dts file:

&mipi_dsi_bridge {
status = "okay";
split-mode;

            panel@0 {
                     reg = <0>;
                     status = "okay";
                     compatible = "auo,g133han01";
                     pinctrl-0 = <&pinctrl_panel>;
                     backlight = <&backlight>;
                     bridge-i2c-bus = <&i2c4>;
                     bridge-info = <4>;
                     bridge-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
                     enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
                      #if useReg
                       power-supply = <&reg_gpio_lvds>;
                       #else
                        power-gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
                        #endif
                        dsi-lanes = <4>;
                        panel-width-mm = <293>;
                        panel-height-mm = <165>;

         
                          port{
                                 panel_in: endpoint {
                                                      remote-endpoint = <&mipi_dsi_bridge_out_odd>;
                                 };
                           };

              };

              panel@1 {
                        reg = <0>;
                        status = "okay";
                        compatible = "auo,g133han01";
                         pinctrl-0 = <&pinctrl_panel>;
                         backlight = <&backlight>;
                         bridge-i2c-bus = <&i2c4>;
                         bridge-info = <4>;      
                         bridge-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
                         enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
                          #if useReg
                           power-supply = <&reg_gpio_lvds>;
                           #else
                           power-gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
                           #endif
                           dsi-lanes = <4>;
                           panel-width-mm = <293>;
                           panel-height-mm = <165>;

                           port{
                                    panel_in_1: endpoint {
                                                       remote-endpoint = <&mipi_dsi_bridge_out_even>;
                                    };
                           };
              };

               ports {
                           port@1 {
                                          mipi_dsi_bridge_out_odd: endpoint {
                                                   remote-endpoint = <&panel_in>;
                                          };
                           };

                           port@2 {
                                           mipi_dsi_bridge_out_even: endpoint {
                                                    remote-endpoint = <&panel_in_1>;
                                            };
                           };
               };
};

Is our alternate way of splitting even and odd signals is correct way ? 

Please provide your feedback.

Thanks,

Antony

[igorpadykov]

Hi Antony

in general one can try to use fsl-imx8mq-evk-dcss-rm67191.dtsi example adjusting "display-timings":

fsl-imx8mq-evk-dcss-rm67191.dtsi\freescale\dts\boot\arm64\arch - linux-imx - i.MX Linux kernel 

>Is our alternate way of splitting even and odd signals is correct way ? 

unfortunately I am not aware of efforts using mipi_dsi_bridge split-mode, may be suggested 

to proceed with that special task with extended support of NXP Professional Services | NXP 

Best regards
igor
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