spdif record_playback latency is unstable

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spdif record_playback latency is unstable

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william_yang1
Contributor I

We use i.MX6 for audio processing, do ASRC to fixed S/PDIF input in 48kHz.

Without any process, i.MX6 direct pass 48kHz S/PDIF to output.

The latency between playback(to i.MX6) and recording(from i.MX6) will increase.

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Environment

  • PC software
    • [Audacity]
    • play and record
  • i.MX6
    • $ alsaloop -P sysdefault:CARD=imxspdif -C sysdefault:CARD=imxspdif -r 48000 -t 8192 -vvvv -f S16_LE
    • the argument [-t] won't change result
  • Latency between PC and Focusrite is 5ms and it is very stable
    • PC => Focusrite spdif out => Focusrite spdif in => PC

Logs and observation

  • alsaloop log, please refer to the attachment
    • expected clock rate = 227328000
    • actual clock rate = 227368421
    • set sample rate to 48008Hz for 48000Hz playback
    • many underruns for playback
    • many times do resync
  • Audio Precision, measure spdif out for Focusrite and i.MX6
    • Focusrite sample rate 47999.9 Hz (diff < 0.1)
    • i.MX6 sample rate 48003.5 Hz (diff > 3.5)
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  • Latency increase until XRUN occur

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Source code and Setting

  • Linux imx6qsabresd 4.9.88-PgFx+
  • imx6qdl.dtsi:
    spdif: spdif@02004000 {
        compatible = "fsl,imx35-spdif";
        reg = <0x02004000 0x4000>;
        interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
        dmas = <&sdma 14 18 0>,
            <&sdma 15 18 0>;
        dma-names = "rx", "tx";
        clocks = <&clks IMX6QDL_CLK_SPDIF_GCLK>, <&clks IMX6QDL_CLK_OSC>,
            <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_ASRC>,
            <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_ESAI_EXTAL>,
            <&clks IMX6QDL_CLK_IPG>, <&clks IMX6QDL_CLK_MLB>,   // <&clks IMX6QDL_CLK_DUMMY>, same result
            <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_SPBA>;
        clock-names = "core", "rxtx0",
                "rxtx1", "rxtx2",
                "rxtx3", "rxtx4",
                "rxtx5", "rxtx6",
                "rxtx7", "dma";
        status = "okay";
    };

Question

  1. Why does the latency increase ( until underrun occurs ) ?
  2. Why actual CPU clock differ than expected clock ?
  3. How to bypass i.MX6, directly pass spdif-IN to spdif-OUT ?

Thanks,

William

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igorpadykov
NXP Employee
NXP Employee

Hi William

nxp linux does not provide any specific or guaranteed latencies, so

one can try to analyze latencies using description of spdif driver in

sect.7.4 The Sony/Philips Digital Interface (S/PDIF) attached Linux Manual

and AN4553 Using Open Source Debugging Tools for Linux on i.MX Processors
https://www.nxp.com/docs/en/application-note/AN4553.pdf 

Also may be recommended to try extended support with Professional Services
NXP Professional Services | NXP 

Best regards
igor
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william_yang1
Contributor I

Hi igor,

Thank you for your prompt reply.

About the latency, my concern is not "how low" but "how stable".

We believe that something may happen causing an increase in latency, e.g., choose a wrong clock source.

First we have a stable experimental environment, then we discuss and debug how to reduce latency.

We know i.MX processor will do ASRC or something processing between receive spdif and transmit spdif, so we would like to know how to bypass all processing, e.g., modify SPDIF_SCR, SPDIF_SRPC, etc.

Thanks,

William

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