soft reset in the imx6ull processor

[Embedded-world]

Dear Experts,

I'm working with Kernel 6.1.1 for a custom SOM with an EVB featuring the iMX6ULL processor. Currently, as per our EVB, we're not utilizing the hard reset (there is no external pin for watchdog1/2/3). Therefore, I'm seeking guidance on how to trigger the watchdog for the RESET switch soft/automatically/internally during reboot time.

I've posted several times regarding this issue, but I haven't received a proper response yet. Could someone please help me with this matter?

1. How do I configure the watchdog in the dts file for soft reset switch?

2. Which watchdog would support soft reset for reboot?

3. How can I verify the proper initialization node in the dts file?

4. Could you provide some solution examples for the above issue?

Best Regards,

Ravikumar 

[Embedded-world]

Hi @Zhiming_Liu 

Thanks for your inputs.

is that possible to do software reset instead of hardware external-pin reset ? 

[Zhiming_Liu]

Hi

If fsl,ext-reset-output present, the watchdog device is configured to assert its external reset (WDOG_B) instead of issuing a software reset. So if you don't add this flag, the driver will issue software reset

Best Regards
Zhiming

[Embedded-world]

Hi Zhiming_Liu.

I've asserted the external reset (WDOG_B) for watchdog1 in the dts file. However, despite this configuration, When I press the reset switch on my board, the reboot is not occurring. I've tried initiating the reboot using the command 'reboot' in minicom terminal emulator,

So How can I troubleshoot this issue? Also, What could be the reason for the reset switch not triggering the reboot, even though I've used the watchdog structure & having properly designed the board?


Thanks & Regards,
Ravikumar

[Zhiming_Liu]

Can you share your dts setting?

[Embedded-world]

Hi Zhiming_Liu

This was the watchdoog configuration in the dts file:

&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
status = "okay";
};

pinctrl_wdog: wdoggrp {
fsl,pins = <
MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0
>;
};

also PFA below with full dts file.


Thank you & Regards,
Ravikumar

[Zhiming_Liu]

Hi @Embedded-world 

Can you also share your reset design?

Thanks& Besr Regards

Zhiming

[Zhiming_Liu · Accepted solution]

Hi 

For watchdog test, you can refer this userspace demo :

https://github.com/nxp-imx/imx-test/tree/lf-5.15.32_2.0.0/test/wdog

For dts, please refer Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml

  fsl,ext-reset-output:
    $ref: /schemas/types.yaml#/definitions/flag
    description: |
      If present, the watchdog device is configured to assert its
      external reset (WDOG_B) instead of issuing a software reset.

You should configure dts like this:

&wdog1 {
	status = "okay";
};
&wdog2 {
	status = "okay";
};
&wdog3 {
	status = "okay";
};

Then use wdt_driver_test program to trigger watchdog.

Best Regards

Zhiming