sf probe in u-boot

[rans]

Hello,

I understand the sf probe in u-boot is not using logical cs, but is a function of gpio number, port and one more value which I am not sure about (the first value "3", which is  marked below):

#define CONFIG_SF_DEFAULT_CS   (3|(IMX_GPIO_NR(3, 25)<<8))

What is this value is it the logical CS ?

If yes, how is it that in kernel I get that spi is detected in kernel as bus 3 cs 0 ("spi3.0"):

spi_imx 200c000.ecspi: probed
m25p80 spi3.0: found mx25l6405d, expected w25q64
m25p80 spi3.0: mx25l6405d (8192 Kbytes)
spi_imx 2014000.ecspi: probed

while in u-boot it is bus 3 cs 3(??) according to 

according to  (3|(IMX_GPIO_NR(3, 25)<<8))

U-Boot> sf probe
bus 3 cs 22787 speed 66000000 mode 57344SF: Detected MX25L6405D with page size 4 KiB, total 8 MiB
U-Boot>

Best Regards,

Ran

[fabio_estevam]

Hi Ran,

I don't have enough context to reply as I don't have access to your schematics.

Basically you need to know what is the GPIO pin that is connected to the SPI chip select.

This varies from board to board. By looking at the schematics you will be able to confirm the correct pin.

Regards,

Fabio Estevam

[rans]

Hello Fabio,

I am not sure it is available (it's lec imx6 base).

It is already working with that code, I just try to understand how it matches the datasheet,

I just try to validate that the code which uses (and function correctly with)

IMX_GPIO_NR(3, 25))  can be 

I do find the following in datasheet: 

ALT0	EIM_D25	EIM_DATA25
ECSPI4_SS3	ALT1
UART3_RX_DATA	ALT2
ECSPI1_SS3	ALT3
ECSPI2_SS3	ALT4
GPIO3_IO25	ALT5
AUD5_RXC	ALT6
UART1_DSR_B	ALT7

So, does it mean that it is actually using CS #3 (not o) ?

Regards,

Ran

[fabio_estevam]

Hi Ran,

I am not familiar with this board and don't have access to its schematics.

You need to look at the schematics and see to what pin the SPI chip select is connected to.

[rans]

I understand.

If you can just point me where u-boot is using the gpio on that flag it will help enough.

I try to find where in u-boot it is using the gpio part and the logic cs part, but can't find it .

I searched in fsl_espi.c but see that cs there is used as a logical cs, not a gpio, so I'm a bit confused with that.

I can't upgrade to mainline kernel because it is specific u-boot for board we're using (adlink's).

Thanks,

ran

[fabio_estevam]

The iMX SPI driver in U-Boot is located at drivers/spi/mxc_spi.c.

Check the board_spi_cs_gpio() function to understand how the GPIO is passed to the driver.

[rans]

Hello Fabio,

Thank you for the very helpful answers.

My question is more of a general, not specific to a board or u-boot version.

I try to understand the rule for configuring device tree flash:

There are 2 fields :

"reg" - cs number

 "cs-gpios" - gpio number

I try to understand how to set these numbers, and how they match reference manual, i.e. if reg is X, and gpio is Y, I try to find it in the reference manual and see that it shows that the gpios and cs number are pointing to the same pin (CS X and GPIO Y are the same according to table 4.1.1).

When checking the various *dts examples in mainline with imx, I did not find match with imx reference datasheet (4.1.1 pin assigenemnt) table.

Can you please provide a single example with reg, and cs-gpios, which shows that they match the reference manual.

Thank you very much for your time,

ran

[fabio_estevam]

Hi Ran,

Just take the dts example from any NXP iMX development board and you can check against the schematics.

[fabio_estevam]

Hi Ran,

Please make sure you are using a recent U-Boot version. Since commit 155fa9af95ac5 ("spi: mxc: fix sf probe when using mxc_spi") the way to represent the SPI and chip select has changed in U-Boot.

In your board config file you should define:

#define CONFIG_SF_DEFAULT_BUS  3
#define CONFIG_SF_DEFAULT_CS   0

and then in your board C file you should add:

int board_spi_cs_gpio(unsigned bus, unsigned cs)
{
    return (bus == CONFIG_SF_DEFAULT_BUS && cs == CONFIG_SF_DEFAULT_CS)
        ? (IMX_GPIO_NR(3, 25)) : -1;
}

Hope this helps.

[rans]

Hello Fabio,

Thank you for the comment, I'll check that (it is u-boot from adlink's patches files, so it might be more problematic to make patches above it).

With the older u-boot, can you please tell me what's the purpose of the first number in macro , (in my source code it is 3, not 0 , I don't understand why, is it a bug ?)

#define CONFIG_SF_DEFAULT_CS   (3|(IMX_GPIO_NR(3, 25)<<8))

Regards,

Ran

[fabio_estevam · Accepted solution]

Hi Ran,

Better use mainline U-Boot instead. It is difficult to support you if you use an old U-Boot code base.

Looks like the 3 you use is because you use SPI bus 3.

Regards,

Fabio Estevam

[rans]

Hello Fabio,

I hope I may ask one more on this issue:

I see in pad table (table 4.1 in imx6 reference)

that

bus 3, cs 0 (IMX_GPIO_NR(3, 25)) is used with gpio4, io 24, which is probably bank 3, pin 24. but in the macro it is used as bank 3, pin 25. Can you please help me understand why there is a difference ?

Pad Name	Mode	Signal	Pad Settings	Pad/Group Registers
ALT1	PUS - 100K_OHM_PU PUE - PULL PKE - ENABLED ODE - DISABLED SPEED - MEDIUM DSE - 40_OHM SRE - SLOW	IPU2_DISP0_DATA03
ALT2	ECSPI3_SS0
ALT5	GPIO4_IO24

Thank you a lot,

ranran