rpmsg on i.MX6SoloX

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rpmsg on i.MX6SoloX

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Contributor II

Hello,

     We are working with the http://www2.keil.com/mdk5/ds-mdk/imx6sxsabrereference

We are looking at using the rpmsg system to transfer data between the m4 processor and the application processor. I set up a basic benchmark using the rpmsg_tty example and have found the performance to be lower than expected from a memory-mapped sharing system, ~400KB/s.

I thought it might have to do with the buffer size between the processors and had some success changing them. I would like to continue down this path but I am unsure of where the values for the VRING bases were derived and how I can safely change them.

In arch/arm/mach-imx/imx_rpmsg.c line 292 there is a hard coded set of address:

/* hardcodes here now. */

rpdev->vring[0] = 0xBFFF0000;

rpdev->vring[1] = 0xBFFF8000;

 

How might I change these such that I can increase the total size of the vrings safely?
I have been looking a the i.MX 6SoloX Applications Processor Reference Manual and the memory range seems to fall outside the memory map, unless I am reading it wrong:

SSI2 - 0xB000 - 4KB
SSI3 - 0xC000 - 4KB

What am I missing?

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Contributor IV

In response to this bit of your question Rick:

I have been looking a the i.MX 6SoloX Applications Processor Reference Manual and the memory range seems to fall outside the memory map, unless I am reading it wrong:

SSI2 - 0xB000 - 4KB
SSI3 - 0xC000 - 4KB

 

What am I missing?

It looks like you are looking at the SDMA memory map, not the system memory map. The system memory map specifies the DDR to be in the range 0x80000000-0xFFFFFFFF for the Cortex-A processor and 0x80000000-0xDFFFFFFF for the Cortex-M series processor.

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NXP Employee
NXP Employee

Hi, maybe it is offtopic. Try look here: GitHub - EmbeddedRPC/erpc-imx-demos: eRPC demos for i.MX devices .

We are developing RPMSG Lite.

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Contributor IV

I have also experianced this issue. One thing I notice is the hard coded values might only apply to the imx7D processor. If you look at the code surrounding the hardcoded values there is a check to see if the processor is an imx7d:

 if (!strcmp(rpdev->rproc_name, "m4")) {
 ret = of_device_is_compatible(np, "fsl,imx7d-rpmsg");
 if (ret) {
 /* hardcodes here now. */
 rpdev->vring[0] = 0xBFFF0000;
 rpdev->vring[1] = 0xBFFF8000;
 }
 } else {
 break;
 }

 pr_debug("%s rpdev%d: vring0 0x%x, vring1 0x%x\n", __func__,
 i, rpdev->vring[0], rpdev->vring[1]);

This may suggest that the memory used for the IMX6SX is somehow dynamic.

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