register value for PLL clock 999MHz

[ludovicleau-mer]

Hi,

a try to get the clock signal from a custom mipi camera board on a sabrelite board. And i have found several code for PLL clock from :

• Debug steps for customer MIPI sensor.docx
• Getting an 'err_id_vc0' error on iMX6 MIPI-CSI   (Yuri     12 nov. 2014 22:05  (en réponse à Erez Steinberg) )

this two message give two different value for a PLL at 999MHz : 0x74 and 0x3a

I try both but for each i have the PHY_STATUS 2f0

What is the good value ?

regards.

[ludovicleau-mer]

I had trying all register value between 0x00 and 0xFF for the PLL clock (mipi_csi2_write(info, 0x000000XY, CSI2_PHY_TST_CTRL1);) and for each i receive several 0x200 and finally the PHY_STATE 0x2f0.

I think i have an error in my driver. Perhaps i forgot to enable something.

The clock signal was checked in the mipi before imx6 : all is ok.

Anybody have an idea on what can be the problem ?

thanks.

[ludovicleau-mer · Accepted solution]

Ok i found the problem :

The camera was started before the init of my module. So i change it and i set the register value 0x3a ( for  999MHz) and i received the statut 3F0 for 4 lane.

I think all is ok. Now i must be check the clock  setting hsp_clk and pixel_clk.

[gusarambula]

Thank you for posting your findings! I'm sure they'll help other community users!