read out i.MX8M-plus serial number

[malik_cisse]

Hello,

We would like to build into our i.MX8M-Plus BSP the possibility to read out a unique Serial Number (SN). Mac address is not very practical though.

In the i.MX8M-Plus chip there is said to be (i.MX 8M Plus Applications Processor Reference Manual, Rev. 1, 06/2021 page 813) a "Unique ID" at the fuse address 0x410 that can be read out. However, it is unclear how to proceed here.

Any example or other hints and suggestions would be much appreciated.

Thx,

[edwardtyrrell · Accepted solution]

Hi @malik_cisse 

And this link https://www.digi.com/resources/documentation/digidocs/embedded/dey/3.0/cc8mnano/bsp_r_otp_8m 

I can read mine with a 5.15.5 kernel straight out of the box using based on the above link: 

The OTP words are accessible through the sysfs at /sys/bus/nvmem/devices/imx-ocotp0/nvmem.

[malik_cisse]

Hi @edwardtyrrell

Thank you for the swift answer.

I could successfully read OCOTP_MAC_ADDR0 Mac address using (bank 9 word 0 and word 1) using the suggested command:
dd status=none if=/sys/bus/nvmem/devices/imx-ocotp0/nvmem of=/dev/stdout bs=4 count=1 skip=36 | hexdump -v -e '4/4 "%08x " "\n"'
dd status=none if=/sys/bus/nvmem/devices/imx-ocotp0/nvmem of=/dev/stdout bs=4 count=1 skip=37 | hexdump -v -e '4/4 "%08x " "\n"'
as suggested in 
https://www.digi.com/resources/documentation/digidocs/embedded/dey/3.0/cc8mnano/bsp_r_otp_8m

I found the bank/word resolution here:
https://wiki.phytec.com/display/public/MD/L-1017e.A1+i.MX+8M+Plus+BSP+Manual#L1017e.A1i.MX8MPlusBSPM...

As for the Unique ID, the ref manual gives the address but not the corresponding bank/word but I guess this should not be too hard to find out.

Thank you

[edwardtyrrell]

Hi @malik_cisse 

Great, sounds like you're nearly there.

What's interesting is the OCOTP_HW_OCOTP_TESTERx bytes lower address words match the Fusemap descriptions i.e. 

Address: 3035_0000h base + 420h offset = 3035_0420h   OCOTP_HW_OCOTP_TESTER1 ->  UID 0x420

Address: 3035_0000h base + 430h offset = 3035_0430h  OCOTP_HW_OCOTP_TESTER2 ->   UID 0x430

Up until the iMX7D these are what Freescale advised us to use for the UID; and as the OCOTP_HW_OCOTP_TESTER bytes are termed 'shadow' registers in the iMX8 I wonder if they contain the same information? Worth asking NXP.. 

If you can find a suitable table within the MMR manual of where everything sits and since you know your MAC it might be worth see if there is a correlation..

EDIT:

Page 871

6.3.2.4 Hardware Visible Fuses
The hwv_fuse bus emanates from the OCOTP block and goes to various other blocks
inside the chip. This bus is made up of the shadow register bits for .
Only a subset of these fuse bits are currently used by the hardware. The fuse bits are
initially copied from the banks after reset is deasserted. When all fuse bits are loaded into
their shadow registers, the OCOTP asserts the fuse_latched output signal.

https://community.nxp.com/t5/i-MX-Processors/Access-OCOTP-registers-in-IMX8MQ/m-p/883929 

There's a clock fix somewhere on this forum that prevents the system freeze. Note the same address that we've been discussing..

[edwardtyrrell]

Hi @malik_cisse 

This link is quite useful https://community.nxp.com/t5/i-MX-Processors/How-can-I-get-UID-on-i-mx8mq-platform/m-p/986789 and in particular where he refers to the OCOTP_HW_OCOTP_TESTER0 bytes.

In the past I have retrieved the UID by something as simple as:

val1=$( cat /sys/fsl_otp/HW_OCOTP_TESTER0)
val2=$( cat /sys/fsl_otp/HW_OCOTP_TESTER1)

I seem to remember having to tweak the kernel config to make 'fsl_otp' appear under /sys/ - this was a 4.9.88 kernel.

Hope it helps!