nwl-dsi configuration

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nwl-dsi configuration

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guido_gunther
Contributor II

Hi,

I'm trying to figure out the details for the above in the linux kernel for a DSI panel:

Looking at

linux-fslc/nwl-dsi.c at 4.9-2.3.x-imx · Freescale/linux-fslc · GitHub 

If vm->hactive is > 255 it will be cut off since according to the reference manual only the lower 16bit of this register (MIPI_DSI_HOST_DPI_INTFC_DSI_HOST_CFG_DPI_PIXEL_FIFO_SEN) are being used.

Also 

linux-fslc/nwl-dsi.c at 4.9-2.3.x-imx · Freescale/linux-fslc · GitHub 

would result in all zeros since 256 > 255.

Is this an error in the docs or are we really  only looing at the lower 16 bits here (which might be all zeros)?

Also non-continous clock mode is being disabled:

Enable here:

linux-fslc/nwl-dsi.c at 4.9-2.3.x-imx · Freescale/linux-fslc · GitHub 

Disabled again here

linux-fslc/nwl-dsi.c at 4.9-2.3.x-imx · Freescale/linux-fslc · GitHub 

Why is this being done?

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diegoadrian
NXP Employee
NXP Employee

Hello,

Which board and kernel are you using?

Best Regards

Diego

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guido_gunther
Contributor II

 

Which board and kernel are you using?

Since this happens in all of NXPs 4.9 kernels (see above link): linux-fslc/nwl-dsi.c at 4.9-2.3.x-imx · Freescale/linux-fslc · GitHub 

the board doesn't matter. I'm seeing this on NXPs reference board as well.

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guido_gunther
Contributor II

If vm->hactive is > 255 it will be cut off since according to the reference manual only the lower 16bit of this register 

Scratch the first part please. It's a 16 bit register not an 8 bit one so it can hold values up to 65535.

The non-continous clock mode part is still unclear to me though.

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