nandtest error on 32GBit NAND using mx6.SOLO

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nandtest error on 32GBit NAND using mx6.SOLO

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Contributor III

Hi all,

I am using imx6SOLO to interface with a new 32Gb NAND flash from MICRON,

MT29F32G08CBADA.

After applying the patch to truncate the remaining bytes out of the

power-of-2, imx6SOLO is able to detect and recognize the NAND flash.

[ 0.346874] ONFI flash detected

[ 0.347012] ONFI param page 0 valid

[ 0.347019] nand: onfi confirmed

[ 0.347035] NAND device: Manufacturer ID: 0x2c, Chip ID: 0x44 (Micron

MT29F32G08CBADAWP)

[ 0.349811] Bad block table found at page 524032, version 0x01

[ 0.352254] Bad block table found at page 523776, version 0x01

[ 0.354979] Creating 3 MTD partitions on "gpmi-nand":

[ 0.354991] 0x000000000000-0x000000600000 : "kobs-ng"

[ 0.355750] 0x000000600000-0x000000a00000 : "kernel"

[ 0.356404] 0x000000a00000-0x000100000000 : "fs"

[ 0.357165] ---------------------------------------

[ 0.357173] NFC Geometry (used by BCH)

[ 0.357179] ---------------------------------------

[ 0.357185] ECC Strength : 56

[ 0.357190] Page Size in Bytes : 8936

[ 0.357195] Metadata Size in Bytes : 10

[ 0.357200] ECC Chunk Size in Bytes: 1024

[ 0.357205] ECC Chunk Count : 8

[ 0.357210] Payload Size in Bytes : 8192

[ 0.357215] Auxiliary Size in Bytes: 20

[ 0.357220] Auxiliary Status Offset: 12

[ 0.357225] Block Mark Byte Offset : 7545

[ 0.357230] Block Mark Bit Offset : 0

[ 0.357329] GPMI NAND driver registered. (IMX)

However, when I tried to perform nandtest in my system, I always get the

error where some of the bytes read back is not the same as written in.

> nandtest /dev/mtd2
ECC corrections: 0

ECC failures : 0

Bad blocks : 6

BBT blocks : 0

00000000: checking...

compare failed. seed 1667286349

Byte 0x23ff is 4f should be 47

Byte 0x882d is db should be d9

Byte 0x1602a is 2f should be 2d

Byte 0x39c1d is 8c should be 88

Byte 0x66815 is 62 should be 60

Byte 0x70833 is fb should be db

Byte 0x7742b is 34 should be 35

Byte 0x8601c is ab should be aa

Byte 0x9c80a is b7 should be b3

Byte 0xb141c is 59 should be 49

Byte 0xc700f is c5 should be c7

Byte 0xcc03c is de should be d6

Byte 0xe1c02 is 3e should be 7e

Byte 0xe6c13 is bc should be fc

Byte 0xea016 is 67 should be 6f

Byte 0xf0441 is 73 should be 72

Byte 0xf4026 is 59 should be 58

Byte 0xfc410 is 76 should be 56

Byte 0x114c40 is c6 should be c4

Byte 0x117c1e is 42 should be 40

Byte 0x13c037 is ea should be e2

Byte 0x151c08 is 74 should be 75

Byte 0x16603b is 52 should be 50

Byte 0x182824 is b7 should be b3

Byte 0x187832 is 88 should be 89

Byte 0x191c40 is 48 should be 40

Byte 0x1b7002 is 47 should be c7

Byte 0x1cf80c is 03 should be 01

Byte 0x1d0c24 is 10 should be 90

Byte 0x1d1c3b is 82 should be c2

Byte 0x1ea83d is c7 should be 87

It seems like for the bytes with error, there are always 1 bit errors, and

the bit location is random. If I tried to perform nandtest several time, the

address of the error bytes are different as well.

I am using linux kernel version 3.0.35. Anybody has any idea why is this

happening? Is there any setting that I need to tweak to make it work?

Thanks.

Regards,

zc

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Contributor III

Hi igor,

I am seeing the gf_len, ecc_chunk_size, mtd->writesize, oob size and metadata size contribute to the ecc_strength.

writesize, oobsize and metadata size are fixed.

Therefore, in order to achieve ecc strength less that 40, i fixed the gf_len to 14, and ecc_chuck_size to 512.

In such the ecc strength that i get will be:

     ((mtd->oobsize - geo->metadata_size) * 8) / (geo->gf_len * geo->ecc_chunk_count);

     ((744 - 10) * 8) / (14 * 8192 / 512) = 5872 / 224 = 26.

With this, i am able to proceed with the nandtest, without error from the first block.

Is there any implication changing the setting as those? nandtest still on going, and I will continue my test by format-write-read big file using ubifs if the nandtest is ok

Regards,

zc

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NXP TechSupport
NXP TechSupport

Hi ZC

I am afraid NAND with  ECC Strength : 56 can not be supported

according to Chapter 17 40-BIT Correcting ECC Accelerator (BCH) IMX6SDLRM

Best regards

igor

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Contributor III

Hi igor,

I think i saw the limitation somewhere else. Therefore, i had manually limit the ECC strength if it is more than 40.

In /drivers/mtd/nand/gpmi-nand/gpmi-nand:

static inline int get_ecc_strength(struct gpmi_nand_data *this)

{

  struct bch_geometry *geo = &this->bch_geometry;

  struct mtd_info *mtd = &this->mtd;

  int ecc_strength;

  ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8)

  / (geo->gf_len * geo->ecc_chunk_count);

  if(ecc_strength > 40)

  ecc_strength = 40;

  /* We need the minor even number. */

  return round_down(ecc_strength, 2);

}

Not sure whether i am doing it the correct way, but i am still getting the bit errors during nandtest.

Regards,

ZC

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NXP TechSupport
NXP TechSupport

Hi ZC

if nand requires >40 ecc correction it can not

be used with i.MX6 BCH module.

Best regards

igor

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Contributor III

Hi igor,

if it cannot be used with i.MX6 BCH module, what should i use? Currently the ecc.mode is set to NAND_ECC_HW.


regards,

zc

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Contributor III

Hi igor,

I am seeing the gf_len, ecc_chunk_size, mtd->writesize, oob size and metadata size contribute to the ecc_strength.

writesize, oobsize and metadata size are fixed.

Therefore, in order to achieve ecc strength less that 40, i fixed the gf_len to 14, and ecc_chuck_size to 512.

In such the ecc strength that i get will be:

     ((mtd->oobsize - geo->metadata_size) * 8) / (geo->gf_len * geo->ecc_chunk_count);

     ((744 - 10) * 8) / (14 * 8192 / 512) = 5872 / 224 = 26.

With this, i am able to proceed with the nandtest, without error from the first block.

Is there any implication changing the setting as those? nandtest still on going, and I will continue my test by format-write-read big file using ubifs if the nandtest is ok

Regards,

zc

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