mmc_select_hs200 failed, error -74

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mmc_select_hs200 failed, error -74

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gjfme
Contributor II

Hi all:

      我们imx6ull 主板在用mfgtool 下载到  Sending partition shell 报错,

 

mmc1: MAN_BKOPS_EN bit is not set
mmc1: mmc_select_hs200 failed, error -74
: switch to mmc1 failed
mmc1: new MMC card at address 0001
mmcblk1: mmc1:0001 P1XXXX 7.20 GiB
mmcblk1boot0: mmc1:0001 P1XXXX partition 1 2.00 MiB
mmcblk1boot1: mmc1:0001 P1XXXX partition 2 2.00 MiB
mmcblk1rpmb: mmc1:0001 P1XXXX partition 3 128 KiB
Unable to handle kernel NULL pointer dereference at virtual address 00000008
pgd = 80004000
[00000008] *pgd=00000000
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 PID: 63 Comm: file-storage Not tainted 4.1.15-2.1.0+ #1
Hardware name: Freescale i.MX6 Ultralite (Device Tree)
task: a831d7c0 ti: a8410000 task.ti: a8410000
PC is at fsg_main_thread+0xa7c/0x1f80
LR is at fsg_main_thread+0xa7c/0x1f80
pc : [<80454eb4>]    lr : [<80454eb4>]    psr: 20000113
sp : a8411ee8  ip : a831d7c0  fp : 43425355
r10: a830bd00  r9 : 53425355  r8 : a8410000
r7 : a83bce00  r6 : a8411f28  r5 : 00000000  r4 : 80a55530
r3 : 80a55568  r2 : 00000001  r1 : 00000000  r0 : 80a55548
Flags: nzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
Control: 10c53c7d  Table: 8000406a  DAC: 00000015
Process file-storage (pid: 63, stack limit = 0xa8410210)
Stack: (0xa8411ee8 to 0xa8412000)
1ee0:                   00000000 808d7ca0 a830bd34 00055302 ab732800 a831d7c0
1f00: 00000000 00000000 80a55548 00000000 c0855000 a831da6c a8411f54 806f03ac
1f20: 00000004 806ecc18 00000000 a831d7c0 8005c450 a8411f34 a8411f34 a83bda40
1f40: a830bd00 00000000 a83bda40 a830bd00 80454438 00000000 00000000 00000000
1f60: 00000000 8004557c 55c355c3 00000000 809bd800 a830bd00 00000000 00000000
1f80: a8411f80 a8411f80 00000000 00000000 a8411f90 a8411f90 a8411fac a83bda40
1fa0: 800454a0 00000000 00000000 8000f468 00000000 00000000 00000000 00000000
1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 55c355c3 55c355c3
[<80454eb4>] (fsg_main_thread) from [<8004557c>] (kthread+0xdc/0xf4)
[<8004557c>] (kthread) from [<8000f468>] (ret_from_fork+0x14/0x2c)
Code: e5b35038 e1550003 03a05000 eb0a667e (e5953008)
g_mass_storage gadget: high-speed config #1: Linux File-Backed Storage

 

  请问是什么问题? 我在dts 中注释掉了    pinctrl-2 = <&pinctrl_usdhc2_8bit_200mhz>;   

mmc_select_hs200 failed, error -74 这个问题是没有了,但是下面的问题还会有。请问怎么回事?

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weidong_sun
NXP TechSupport
NXP TechSupport

Hi,

Due to hardware limitations, the usdhc clock is constrainted to be 132MHz.

&usdhc1 {
compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
assigned-clocks = <&clks IMX6UL_CLK_USDHC1_SEL>, <&clks IMX6UL_CLK_USDHC1>;
assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
assigned-clock-rates = <0>, <132000000>;
};

&usdhc2 {
compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>;
assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
assigned-clock-rates = <0>, <132000000>;
};

The clock speed's max value can't exceed 150MHz.

[note]

1. For High speed mode, uSDHC IO voltage must be 1.8V.

2. if you are using 3.3V IO, The max value of uSDHC clock speed can't exceed 50MHz

3. you can add these 2 members to usdhc node in device tree for debug purpose:

......

no-1-8-v;  /* optional:  if 3.3V IO is used, add it ,please!  ; if 1.8V IO is used, comment it, please! */
max-frequency=<500000>; /* you can modify the value duiring debugging it. for example , 100M, 120M, 132M etc*/

......

Have a nice day!

B.R,

weidong

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3,948 次查看
weidong_sun
NXP TechSupport
NXP TechSupport

Hi,

Due to hardware limitations, the usdhc clock is constrainted to be 132MHz.

&usdhc1 {
compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
assigned-clocks = <&clks IMX6UL_CLK_USDHC1_SEL>, <&clks IMX6UL_CLK_USDHC1>;
assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
assigned-clock-rates = <0>, <132000000>;
};

&usdhc2 {
compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc";
assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>;
assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
assigned-clock-rates = <0>, <132000000>;
};

The clock speed's max value can't exceed 150MHz.

[note]

1. For High speed mode, uSDHC IO voltage must be 1.8V.

2. if you are using 3.3V IO, The max value of uSDHC clock speed can't exceed 50MHz

3. you can add these 2 members to usdhc node in device tree for debug purpose:

......

no-1-8-v;  /* optional:  if 3.3V IO is used, add it ,please!  ; if 1.8V IO is used, comment it, please! */
max-frequency=<500000>; /* you can modify the value duiring debugging it. for example , 100M, 120M, 132M etc*/

......

Have a nice day!

B.R,

weidong

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gjfme
Contributor II

Hi weidong:

    感谢解答

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