mipi error on Sabrelite

[Selea]

on a sabrelite with OV5640_mipi sensor, I have the following error:

"mipi csi2 can not receive sensor clk! 200"

when it loads the sensor driver..

Omar.

[Selea]

looking in the driver the ov5640_init_mode function is waiting for a change of status on the dphy reg:

“”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"
/* wait for mipi sensor ready */
while (1) {
mipi_reg = mipi_csi2_dphy_status(mipi_csi2_info);
if (mipi_reg != 0×200)
break;
if (i++ >= 20) {
pr_err(“mipi csi2 can not receive sensor clk! %x\n”, mipi_reg);
return -1;
}
msleep(10);
}
“”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"”"

[daiane_angolini]

can you see your camera in i2c bus? (like using some tools such as i2c-tools)

Is your camera model supported?

[Selea]

yes I'm uing the ov5640 (mipi version) supported. The hardware if the moudle from boundary , o i hope is ok.

I can see it on I2C (the init of the registers is ok).

The driver init fail when it is waiting the correct csi2_dphy status... it is always 0x200...

[daiane_angolini]

what do you mean by "driver init fail"?

From your last replies your camera is alive. clock is OK. hardware is OK. support is OK.

does the error you´ve been facing, occurs when kernel is booting, or when you modprobe the driver?

[Selea]

.. no i still have the error on clock.

but i read on boundary support, there should be a fix on theri github on 3.10.17. I will try it today.

[Selea]

Last update:

i rebitbaked the core-image-base with 3.0.35(boundary) and the ov5640mipi is working.

SO the problem seems to be in the 3.10.17 kenel (or its configuration), I used he notrogen6x_defconf as base.

Omar

[Selea]

Still investigating on this issue... no solution yet.

:smileyconfused:

Omar

[TroyKisky · Accepted solution]

Hi Omar

It seems the issue is that your are not using an hdmi monitor. Mipi needs a clock

that was missed, and hdmi happens to enable. Here's a patch.

Troy

[adc1]

Hi,

I found out a branch of kernel 3.0.35 (https://github.com/boundarydevices/linux-imx6/tree/boundary-imx_3.0.35_4.1.0) that seems to contain the same patch you give to update 3.10.17 kernel to work without HDMI.

Now in board-mx6_nitrogen6x.c there is that structure:

static struct mipi_csi2_platform_data mipi_csi2_pdata = {

    .dphy_clk = "mipi_pllref_clk",

    .pixel_clk = "emi_clk",

    .cfg_clk = "hdmi_isfr_clk",

};

how could I update .cfg_clk to refer to a valid clock in place of the hdmi one? could someone give me some advice?

thank you again,

regards

Andrea

[adc1]

Hi Troy,

which is the kernel version of that patch? I'm using 3.0.35 and it doesn't fit with my code.

I'm using a BoundayDevice board and I found that structure in board-mx6_nitrogen6x.c

static struct mipi_csi2_platform_data mipi_csi2_pdata = {

    .ipu_id     = 0,

    .csi_id = 0,

    .v_channel = 0,

    .lanes = 2,

    .dphy_clk = "mipi_pllref_clk",

    .pixel_clk = "emi_clk",

};

have I to add a third clock named .cfg_clk? could you give me some advice?

regards

Andrea

[Selea]

Thanks troy!!! :smileyhappy::smileyhappy::smileyhappy::smileyhappy:

[weidong_sun]

Hello, Omar,

      Please refer to this : https://community.freescale.com/docs/DOC-94312, and debug your carmera according to documents on it .

Regards,

Weidong

[meflo]

Hi everybody,

am having a similar problem described in this thread.

I am trying to capture some data from a decoder connected to an imx6 quad board through 1 data lane connection.

The connection is through IPU 0, CSI 1.

The relevant structures are:

static struct fsl_mxc_camera_platform_data mipi_csi2_data = {

       .mclk = 108000000,

       .mclk_source = 0,

       .csi = 1,

       .io_init = mx6q_dec_init,

       .pwdn = NULL,

};

static struct mipi_csi2_platform_data mipi_csi2_pdata = {

       .ipu_id      = 0,

       .csi_id      = 1,

       .v_channel      = 1,

       .lanes             = 1,

       .init                = mx6q_dec_init,

       .dphy_clk        = "mipi_pllref_clk",

       .pixel_clk        = "emi_clk",

};

static struct fsl_mxc_capture_platform_data capture_data[] = {

     {

          .csi = 1,

          .ipu = 1,

          .mclk_source = 0,

          .is_mipi = 0,

          },

          {

          .csi = 1,

          .ipu = 0,

          .mclk_source = 0,

          .is_mipi = 1,

          },

};

The problem I am having is:

MIPI_CSI_PHY_STATE register has the value 0x210 ; so the phy_rxclkactivehs is always 0.

The clock that is output from the decoder to the imx module is 108 MHz. I found references in this forum stating that: the MIPI DPHY clock should match the camera sensor clock.

So, I should be setting the CSI2_PHY_TST_CTRL1 register like:

mipi_csi2_write(info, 0x00000040, CSI2_PHY_TST_CTRL1);

But still the phy_rxclkactivehs bit is never set.

Any ideas?

Thank you

[weidong_sun]

Hi, Omar,

     There are 2 kinds of possibilities:

(1)OV5640 module didn't output clock.

you can open ov5640 mipi driver and add some debug information to print clock value, then ask hardware engineer to help you meause this clock on board.

(2)Hardware connections are not correct.

Please check if there exists NET errors in schematic! For example , if connections of CLK_N and  CLK_P are wrong, MIPI CSI2 in CPU can't revcive clock from OV5640.

Please try !

Regards,

Weidong

[Selea]

Hi Weidong

I'm using the sabrelatiwith its own ov5640 mipi module so I think the hardware should be ok, but i will check it.

i will add some debug to have more info.

Thanks

Omar