Hi @wonk-andy ,
I have tried NXP i.MX8MM BSP with SDP 7.1. I can try 7.0 later but currently it is a lot of effort because we use 7.1 and 8.0 SDP only. However I was able to get an issue (board freeze). Not sure if same like you.
I have modified raminfo to use only 1GB of RAM and used your setup:
+ add_ram(IMX_SDRAM0_BASE, MEG(IMX_SDRAM0_SIZE) - MEG(2));
+// add_ram(IMX_SDRAM1_BASE, MEG(IMX_SDRAM1_SIZE));
/* Add 4 KB /memory/dma region. This region is not used by QNX and is dedicated to DMA. */
as_add(IMX_SDRAM0_BASE, IMX_SDRAM0_BASE + KILO(4) - 1, AS_ATTR_NONE, "dma", as_default());
In pingpong_example.c I have modified mem_addr:
@@ -203,7 +203,7 @@ int main(int argc, char **argv)
#else
/* SDRAM start + 4KB offset : there is a hole for RPMsg-lite,
defined in BSP startup/boards/../../imx_init_raminfo.c */
- init.mem_addr = 0x80000000 + (4 * 1024);
+ init.mem_addr = 0x7ff00000;
Then I executed :
# pingpong_example -m &
And got the board freeze. Then I used QNX debug session to check where the code hangs. On my side the hang is not caused by mmap_device_memory (it maps the memory correctly) but caused by bus error when platform_recv_thread() is trying to write a value to some MU register. MU is not enabled by default in our NXP i.MX8MM BSP startup code. Can you check this on your side ? I had to add this code in imx_init_clocks.c startup module.
@@ -911,6 +911,7 @@ int imx_init_clocks(imx_startup_data_t * startup_data)
/* Enable SDMA1,2 */
out32(IMX_CCM_BASE + IMX_CCM_CCGRn_SET(IMX_CCM_CCGR_SDMA1), 0x03);
out32(IMX_CCM_BASE + IMX_CCM_CCGRn_SET(IMX_CCM_CCGR_SDMA2), 0x03);
+ out32(IMX_CCM_BASE + IMX_CCM_CCGRn_SET(IMX_CCM_CCGR_MU), 0x03);
return 0;
} while (0);
return -1;
After this the example works fine:
# pingpong_example &
[1] 143382
pingpong_example
# pingpong_example -m &
[2] 147481
pingpong_example
Remote got data 0x01 len 1 bytes from source endpoint 30
Master got data 0x02 len 1 bytes from source endpoint 40
Remote got data 0x03 len 1 bytes from source endpoint 30
Master got data 0x04 len 1 bytes from source endpoint 40
Remote got data 0x05 len 1 bytes from source endpoint 30
Master got data 0x06 len 1 bytes from source endpoint 40
Remote got data 0x07 len 1 bytes from source endpoint 30
Master got data 0x08 len 1 bytes from source endpoint 40
Remote got data 0x09 len 1 bytes from source endpoint 30
Master got data 0x0a len 1 bytes from source endpoint 40
Remote got data 0x0b len 1 bytes from source endpoint 30
Master got data 0x0c len 1 bytes from source endpoint 40
Remote got data 0x0d len 1 bytes from source endpoint 30
Master got data 0x0e len 1 bytes from source endpoint 40
Remote got data 0x0f len 1 bytes from source endpoint 30
Master got data 0x10 len 1 bytes from source endpoint 40
Remote got data 0x11 len 1 bytes from source endpoint 30
Master got data 0x12 len 1 bytes from source endpoint 40
Remote got data 0x13 len 1 bytes from source endpoint 30
Master got data 0x14 len 1 bytes from source endpoint 40
Remote got data 0x15 len 1 bytes from source endpoint 30
Remote done
Master done
#