imx93evk - Enable LPUART via IOMUX not working

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imx93evk - Enable LPUART via IOMUX not working

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rti
Contributor II

Hello all,

I am currently working with an imx93evk board.

I want to enable the LPUART3 via the GPIO Pins. Looking to the imx93evk Board Design in the IOMUX page I can see that for GPIO_IO14/15 we have as ALT1 the UART3 TX/RX.

Register

Piece of code:

    IOMUXC_SetPinMux(IOMUXC_PAD_GPIO_IO14__LPUART3_TX, 0U);
    IOMUXC_SetPinMux(IOMUXC_PAD_GPIO_IO15__LPUART3_RX, 0U);
    IOMUXC_SetPinConfig(IOMUXC_PAD_GPIO_IO15__LPUART3_RX,
                        IOMUXC_PAD_PD_MASK);
    IOMUXC_SetPinConfig(IOMUXC_PAD_GPIO_IO14__LPUART3_TX,
                        IOMUXC_PAD_DSE(15U));
 
I also enable the Clock of LPUART3.
 
Is there anything missing to enable the LPUART via the GPIO pins?
 
 
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danielchen
NXP TechSupport
NXP TechSupport

Hi @rti 

If you just need to enable LPUART3 in Linux, you can refer to below link.

How to enable UART3 in FRDM-IMX93 board - NXP Community

 

Regards

Daniel

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rti
Contributor II

Hello,

I made the same configuration but now for LPUART6 and everything works fine.

In addition I saw that in the imx93evk there is a reference that IW61X has GPIO12-15 mapped to SPI and UART2. Is this reserving completely the Pins or is there a TMUX where we can switch between M.2 Module and IOMUX ALTX pinout?

 

Thanks.

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manuelrodriguez
NXP Employee
NXP Employee

Hi @rti ,

Are you using the SDK for this one? do you want to enable it on the M33?

Is Linux also running here? 

What EVK are you using?

There aren't many device trees where those pads are being used but just wanted to double check that:

https://github.com/nxp-imx/linux-imx/blob/lf-6.12.y/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts#...

https://github.com/nxp-imx/linux-imx/blob/lf-6.12.y/arch/arm64/boot/dts/freescale/imx93-tqma9352-mba...

 

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rti
Contributor II

Hello  @manuelrodriguez ,

 

Thanks for the reply.

 

I am using imx93evk 11x11 and SDK 24.12.

I want to enable the LPUART3 in the M33 core. I was able to do it for the LPUART6.

I am in doubt if this is blocked (since in the HW scheme, the pins are mentioned to be reserved for M2 module) or if it is already reserved by the kernel, or a third option if some TMUX is necessary to configure.

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manuelrodriguez
NXP Employee
NXP Employee

Hi @rti ,

The code seems OK, and the default device tree is not using those pads (assuming you have an image with both Linux and M33 firmware running).

However where are you measuring the signals? I'm assuming you have a TTY2USB converter connected to J1001 pin 8 and 10?

Screenshot from 2025-04-14 10-43-51.png

 

The mention in the schematics I think refer to the IW61 pins not the i.MX93, if you are referencing this:

Screenshot from 2025-04-14 10-46-39.png

Any support, information, and technology (“Materials”) provided by NXP are provided AS IS, without any warranty express or implied, and
NXP disclaims all direct and indirect liability and damages in connection with the Material to the maximum extent permitted by the applicable
law. NXP accepts no liability for any assistance with applications or product design. Materials may only be used in connection with NXP
products. Any feedback provided to NXP regarding the Materials may be used by NXP without restriction.
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