imx93 LVDS clock settings

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imx93 LVDS clock settings

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mark_vogt
Contributor I

I am trying to output LVDS using i.MX93 but I am having trouble adjusting the LVDS clock frequency. 

I am using imx93-11x11-evk-boe-wxga-lvds-panel.dts as an example, but I'm having trouble understanding this section for the clocks.

 

&lcdif {
	assigned-clock-rates = <498000000>, <71142857>, <400000000>, <133333333>;
};

 

I am trying to get a 1024x600 display working with a pixel clock of  51.2MHz.  I have gotten close (57MHz) with the following settings, but the display is stretched in the horizontal direction.  

Here are the clk settings I used to get 57MHz.  I assumed the first 2 clocks are 7x because that was what the 8mplus used.  

assigned-clock-rates = <400000000>, <57142857>, <400000000>, <133333333>;

Here is my display timing in panel simple

	.clock = 51200,
	.hdisplay = 1024,
	.hsync_start = 1024 + 178,
	.hsync_end = 1024 + 178 + 20,
	.htotal = 1024 + 178 + 20 + 178,	//1400
	.vdisplay = 600,
	.vsync_start = 600 + 95,
	.vsync_end = 600 + 95 + 10,
	.vtotal = 600 + 95 + 10 + 95,		//800

 

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AchimKanert1
Contributor II

Hi,

can you perhaps share the source code changes needed.

Regards,

Achim  Kanert

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mb1
Contributor III

Hi.

We're also facing problems adjusting the clock values according to our needs.

We had a working solution with 6.1.1_1.0.0 release based kernel code. Something seemed to have changed. We usually follow this formula:

#define PIXCLK 25175000

&lcdif {
       	assigned-clock-rates = <(PIXCLK * 7)>, <PIXCLK>, <400000000>, <133333333>;
};

 

Would be great if you could share your advice public instead of mailing it private to some people.

 

Best regards

Markus Bauer

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joanxie
NXP TechSupport
NXP TechSupport

I have already mailed to you, pls modify the source code according to my suggestion

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etostd
Contributor I
Can you please share your suggested modification?
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joanxie
NXP TechSupport
NXP TechSupport

do you mind creating a new thread for you request? click "submit a ticket"

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