imx8qxp uboot202004

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imx8qxp uboot202004

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gravity_one
Contributor III

scfw1.7.0 + uboot 202004 

 

use uboot202004

#define DSRC_PRI_RSTn IMX_GPIO_NR(4, 22)

int ret=gpio_request(DSRC_PRI_RSTn, "DSRC_PRI_RSTn");

printf("gpio_request: %d \n", ret);

error: gpio_request: 3

Screenshot from 2021-02-02 10-05-04.png

 

 

 

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2 Replies

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igorpadykov
NXP Employee
NXP Employee

Hi grayli_wang

 

>#define DSRC_PRI_RSTn IMX_GPIO_NR(4, 22)

 

seems this pad (LSIO_GPIO4_IO22) already defined in dts:

pinctrl_usdhc2_gpio: usdhc2gpiogrp {

SC_P_USDHC1_CD_B_LSIO_GPIO4_IO22 0x00000021

https://source.codeaurora.org/external/imx/uboot-imx/tree/arch/arm/dts/fsl-imx8qxp-mek.dts?h=imx_v20...

 

Best regards
igor

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681 Views
gravity_one
Contributor III
#define DSRC_PRI_RSTn	IMX_GPIO_NR(4, 22)
#define DSRC_SEC_RSTn	IMX_GPIO_NR(2, 3)
static iomux_cfg_t dsrc_pads[] = {
	SC_P_USDHC1_CD_B  | MUX_MODE_ALT(4) | MUX_PAD_CTRL(UART_PAD_CTRL),
	SC_P_SCU_GPIO0_00 | MUX_MODE_ALT(4) | MUX_PAD_CTRL(UART_PAD_CTRL),
};

static void dsrc_init(void)
{
	imx8_iomux_setup_multiple_pads(dsrc_pads, ARRAY_SIZE(dsrc_pads));

	int ret=gpio_request(DSRC_PRI_RSTn, "DSRC_PRI_RSTn");printf("%s lookup DSRC_PRI_RSTn failed ret = %d\n", __func__, ret);
	gpio_direction_output(DSRC_PRI_RSTn, 0);
	mdelay(100);
	gpio_set_value(DSRC_PRI_RSTn, 1);
	gpio_free(DSRC_PRI_RSTn);

	mdelay(100);

	ret=gpio_request(DSRC_SEC_RSTn, "DSRC_SEC_RSTn");printf("%s lookup DSRC_SEC_RSTn failed ret = %d\n", __func__, ret);
	gpio_direction_output(DSRC_SEC_RSTn, 0);
	mdelay(100);
	gpio_set_value(DSRC_SEC_RSTn, 1);
	gpio_free(DSRC_SEC_RSTn);
}

 

test log:

U-Boot SPL 2020.04-4.14.98-2.3.1+gc2adcb7 (Feb 03 2021 - 09:38:26 +0000)
Normal Boot
WDT:   Not found!
Trying to boot from SPI
Load image from QSPI 0x53400
U

U-Boot 2020.04-4.14.98-2.3.1+gc2adcb7 (Feb 03 2021 - 09:38:26 +0000) (TCU V0.604)

CPU:   NXP i.MX8QXP RevC A35 at 1200 MHz at 48C

Model: NXP i.MX8QXP MEK
Board: iMX8QXP MEK

 BuildInfo:
  - SCFW 0d54291f, SECO-FW f449a0d2, IMX-MKIMAGE d7f9440d, ATF bb209a0
  - U-Boot 2020.04-4.14.98-2.3.1+gc2adcb7

Boot:  FLEXSPI
DRAM:  2 GiB
dsrc_init lookup DSRC_PRI_RSTn failed ret = 3
dsrc_init lookup DSRC_SEC_RSTn failed ret = 3
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from SPI Flash... SF: Detected mt35xu512aba with page size 256 Bytes, erase size 128 KiB, total 64 MiB
OK
In:    serial
Out:   serial
Err:   serial
Net:
Warning: ethernet@5b040000 (eth0) using random MAC address - fe:e9:f2:f4:90:50
eth0: ethernet@5b040000 [PRIME]
Warning: ethernet@5b050000 (euh1) using random MAC address - c2:2d:e4:d8:ca:d9
, eth1: ethernet@5b050000
Fastboot: Normal
Normal Boot
Hit any key to stop autoboot:  0

 

GPIO2_3 has not been used on dts.

 

opend CONFIG_USB_TCPC=y  ,

tepy c GPIO  is return 3 .

test log:

U-Boot 2020.04-4.14.98-2.3.1+gc2adcb7 (Feb 03 2021 - 09:29:02 +0000) (TCU V0.604)

CPU:   NXP i.MX8QXP RevC A35 at 1200 MHz at 49C

Model: NXP i.MX8QXP MEK
Board: iMX8QXP MEK

 BuildInfo:
  - SCFW 0d54291f, SECO-FW f449a0d2, IMX-MKIMAGE d7f9440d, ATF bb209a0
  - U-Boot 2020.04-4.14.98-2.3.1+gc2adcb7

Boot:  USB
DRAM:  2 GiB
setup_typec lookup GPIO5_9 failed ret = 3
dsrc_init lookup DSRC_PRI_RSTn failed ret = 3
dsrc_init lookup DSRC_SEC_RSTn failed ret = 3

 

 Have you tested it? Can you test it on the development board。

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