Hello:
imx8qxp , I want to use PCIE,but init fail,Please help to slove it.thank you.
[ 2.088471] OF: PCI: host bridge /pcie@0x5f010000 ranges:
[ 2.093633] OF: PCI: No bus range found for /pcie@0x5f010000, using [bus 00-ff]
[ 2.101031] OF: PCI: IO 0x7ff80000..0x7ff8ffff -> 0x00000000
[ 2.106928] OF: PCI: MEM 0x70000000..0x7fefffff -> 0x70000000
[ 2.115132] imx-pcie 5f010000.pcie: ERROR PM_REQ_CORE_RST is still set.
[ 2.122458] imx-pcie 5f010000.pcie: pcie phy pll can't be locked.
[ 2.168236] imx-pcie 5f010000.pcie: failed to initialize host
您好,我也遇到了同样的问题,请问一下是怎么解决的,谢谢!
我的原理图:
我的启动logo如下:
[ 0.948995] OF: PCI: host bridge /pcie@0x5f010000 ranges:
[ 0.949005] OF: PCI: No bus range found for /pcie@0x5f010000, using [bus 00-ff]
[ 0.949018] OF: PCI: IO 0x7ff80000..0x7ff8ffff -> 0x00000000
[ 0.949033] OF: PCI: MEM 0x70000000..0x7fefffff -> 0x70000000
[ 0.951582] imx6q-pcie 5f010000.pcie: ERROR PM_REQ_CORE_RST is still set.
[ 0.972396] imx6q-pcie 5f010000.pcie: pcie phy pll can't be locked.
[ 1.012421] imx6q-pcie 5f010000.pcie: failed to initialize host
[ 1.012426] imx6q-pcie 5f010000.pcie: unable to add pcie port.
您好!
我也遇到了和您一样的问题,log一模一样,请问您最后是怎么解决的呢?
能否贴一下你的dts部分呢?
谢谢!
你还,是硬件电路的问题,pcie两根线要加下拉电阻,具体你可以咨询代理商。提供解决方案。
感谢回复!
我们使用的是外部clk,外部clk的话pcie两根线不用加下拉电阻对吗?
请问还有什么原因为出现这样的log呢?
使用外部clk,不用。 你有demo板吗,用demo板,对比测量一下信号。
感谢帮助,问题已经解决,对比发现是外部给imx8的clk不稳定导致的。
imx-scfw-porting-kit-0.7/mx8qx_b0/scfw_export_mx8qx/platform/board/mx8qx_mek/board.c
/* Used whenever HSIO SS powered up. Valid return values are
BOARD_PARM_RTN_EXTERNAL or BOARD_PARM_RTN_INTERNAL */
case BOARD_PARM_PCIE_PLL :
- rtn = BOARD_PARM_RTN_EXTERNAL;
+ rtn = BOARD_PARM_RTN_INTERNAL;
重新生成scfw_tcm.bin。
你好,我根据你说的修改后PLL是锁了,但还是会初始化失败
能否贴一下你的dts部分呢
谢谢~
Hi,
Can you show your schematic for more detail about pcie ?
Then you can refer to it. https://community.nxp.com/message/1115151
BR
Hi 健 谭
unfortunately so far there is no hardware guide document for that part (it is still preproduction),
Some preliminary pcie check points: check AC coupling at each transmitter (use a 0.22 μF cap on both the
PCIE_TXP and PCIE_TXN outputs). The receiver must be DC coupled.
Check voltages on VDD_PCIE0_1P0, VDD_PCIE1_1P0,
PCIE_REF_QR ball should be connected to ground through a 453 Ω, 1% resistor,
PCIE_REXT ball should be connected to the PCIE0_PHY_PLL_REF_RETURN
ball through an 845 Ω, 0.5% resistor.
One can try with i.MX8QXP Demo files
https://www.nxp.com/webapp/Download?colCode=L4.14.78_1.0.0_MX8QXP&appType=license&location=null
use Linux L4.14.78_1.0.0
https://source.codeaurora.org/external/imx/linux-imx/tree/?h=imx_4.14.78_1.0.0_ga
Best regards
igor
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thanks