imx8qxp, help on IOMUXD_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0

[_angelo_]

Hi all,

looking on RM Rev. 0, 05/2020, page 773, "IOMUXD_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0" section. I cannot understand properly the RM, about how to use this register.

Not sure if i understand properly, is bit 4 (PSW_OVR) to be used to set all TX/RX lines level to work at 1.8/3.3 or 2.5V ?

Thanks

[_angelo_]

Thanks for the support.

[_angelo_]

Hi @riteshmpatel ,

ok, so if my logic is at 1.8V, i shouldn't touch such registers. Correct ?

[riteshmpatel · Accepted solution]

Hi @_angelo_,

PSW_OVR should be set to 0 for 1.8/3.3V logic operation.

Thanks & Regards,
Ritesh M Patel

[riteshmpatel]

Hi @_angelo_,

I hope you are doing well.

PSW_OVR is an override bit that enables using 2.5V with the compensation IO cell, which natively only supports 1.8V and 3.3V.

Thanks & Regards,
Ritesh M Patel