imx8qxp bootaux from ddr

[_angelo_]

Hi all,

using 5.4.70_2.3.0, u-boot 2020.04-5.4.70-2.3.3, scm fw 1.7.3

I am trying to bootaux a 2MB m4 code from ddr.

With all resources in a single partition (no mkimage alt-config flags, no -p), bootaux seems to work.

With 3 partition layout (altconfig) i get the following error from u.-boot

=> run m4boot_0
Power on aux core 0
SC_ERR_NOACCESS

 Function failing from u-boot is

sc_pm_set_resource_power_mode(-1, core_rsrc, SC_PM_PW_MODE_ON)  in arch/arm/mach-imx/imx8/cpu.c

The caller is u-boot (A) and should have rights and should be already parent of the m4 partition.

Any help is welcome, thanks.

[_angelo_]

Hi,

thanks a lot, m4 app is running.

Only issue open now is that M4 console get stolen from SCFW, likely
due to the fact that m4 run later, so i am now tracing on A side.

Regards,
angelo

[_angelo_]

Thanks a lot.

I have now m4 app running by bootaux, only detail still to fix is that M4 console is stolen from SCFW, so tracing on A side.

[_angelo_]

Hi @Dhruvit ,

thanks for the support.

I can now "bootaux" m4 bianry, not getting lockup reset anymore.
Reason was related a wrong reset vector addresses, stored @ 0 and 4 ,
outside 0x88000000 ddr range.

Now, btw, m4 code (sdk hello_world built for ddr) seems stuck somewhere
before main(), i think inside startup.o. Nothing is displayed in the m4 console. 

[Dhruvit · Accepted solution]

Hi @_angelo_ 

I hope you are doing well

Please verify the process of  "Building flash.bin image" from section 7 of AN13275.

for more information please refer this link.

Getting Started with MCUXpresso SDK for i.MX 8QuadXPlus Ch-7 .

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/How-to-enable-cortex-M4-on-i-MX8QXP-Mult...

https://source.codeaurora.org/external/imxsupport/m4ctrl/about/

Thanks & Regards

Dhruvit Vasavada

[Dhruvit]

Hi @_angelo_,

Please confirm if partition 3 is dynamically created.

Thanks & Regards,
Dhruvit.

[_angelo_]

Hi,

debugging into scmfw "svc" code, i get:

board_init_ddr(0)
SCFW: DDR frequency = 1200000000

board_system_config(0, 1)
board_system_config(): SC_PT 00000000
board_system_config(): SECO_PT 00000002
board_system_config(): pt_boot 00000001
board_system_config(): creating m4 partition
board_system_config(): pt_m4_0 00000003
(shared partition seemd 00000004)

the reason seems to be that u-boot someway creates a partition 5 (os_part) and wants to be the caller_pt to access resource SC_R_M4_0_PID0 (278) actually bind to 3, so cannot be accessed from 5.

I am looking now for the proper fix.

[_angelo_]

Finally can boot by:

- setting m4 partition as not isolated, this allow atf to move the resource to "os" part (5)
- on atf, moving mu SC_R_M4_0_MU_1A to boot part

=> run m4boot_0
Power on aux core 0
Copy image from 0xa0000000 to 0x88000000
Start M4
bootaux complete

I have btw a last issue, m4 start produces a lockup reset event

CM4 reset event (rsrc=278, event = 2)
PT5 reboot failed (error = 11)
board fault(0, 4, 5)

[Dhruvit]

Hi @_angelo_ ,

I hope you are doing well

For the lockup reset, please look at the points mentioned below.

As the ARM M4 manual says "...The processor enters a lockup state if a fault occurs when executing the NMI or HardFault handlers.

->A fault generated within the NMI handler can cause the processor to enter a lockup state.

-> you can set a breakpoint in hardfault Handler to debug.

-> If hardfault handler is not defined, it might go in a dead loop & watchdog timer will trigger the reset.

->Trying to execute SVC instructions in HardFault or NMI exception handler can create lockup.

-> One can check if stack overflow is occurring due to the limited size of the stack.

Thanks & Regards

Dhruvit Vasavada