imx8plus DRAM swapped memory lane recognition problem

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imx8plus DRAM swapped memory lane recognition problem

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Andras_Magyar
Contributor I

Dear Experts,

We try to bring up a custom iMXPlus board first with MScale DDR tool to calibrate the LPDDR4 memory. Our memory is 4GB and our problem is that the MScale tool is only able to detect half of it (2GB).

Our question is do you think it is a configuration or soldering problem?

Below I send the info about the hw and sw as well:

Memory side DDR connection of the schematic:

Andras_Magyar_0-1745387776548.png

iMX8Plus side DDR connection of the schematic:

Andras_Magyar_1-1745387835665.png

imx8 Config tool setting  that does not work for 4GB (then we export the .ds file to MScale tool that generated the timing for bootloader). For the working configuration (2GB) we set Density per channel  per chip select to 16Gb and only 1 used chip select.

imxconfig_tool.png

imxconfig_tool2.png

imxconfig_tool3.png

Finally the MScale log when we tried to do the callibration:

Download is complete
Waiting for the target board boot...

********Found PMIC PCA9450**********
hardware_init exit

*************************************************************************

*************************************************************************

*************************************************************************
MX8 DDR Stress Test V3.30
Built on Nov 24 2021 13:52:12
*************************************************************************

Waiting for board configuration from PC-end...

--Set up the MMU and enable I and D cache--
- This is the Cortex-A53 core
- Check if I cache is enabled
- Enabling I cache since it was disabled
- Push base address of TTB to TTBR0_EL3
- Config TCR_EL3
- Config MAIR_EL3
- Enable MMU
- Data Cache has been enabled
- Check system memory register, only for debug

- VMCR Check:
- ttbr0_el3: 0x97d000
- tcr_el3: 0x2051c
- mair_el3: 0x774400
- sctlr_el3: 0xc01815
- id_aa64mmfr0_el1: 0x1122

- MMU and cache setup complete

*************************************************************************
ARM clock(CA53) rate: 1200MHz
DDR Clock: 1600MHz

============================================
DDR configuration
DDR type is LPDDR4
Data width: 32, bank num: 8
Row size: 16, col size: 10
Two chip selects are used
Number of DDR controllers used on the SoC: 1
Density per chip select: 2048MB
Density per controller is: 4096MB
Total density detected on the board is: 4096MB
============================================

MX8M-plus: Cortex-A53 is found

*************************************************************************

============ Step 1: DDRPHY Training... ============
---DDR 1D-Training @1600Mhz...
PMU: Error: CA Training Failed.
PMU: ***** Assertion Error - terminating *****
[Result] FAILED

Thanks for you answer in advance,

Andras Magyar

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1,579 Views
Andras_Magyar
Contributor I

Hi Rita,

We use the config tool because it is easy to configure the LPDDR4 there (respect to the excel RPA file) that generates us the .ds file that we can feed in to the Mscale DDR tool. With Mscale tool we calibrate the memory that generates us the timing.c file that we put into the bootloader. That is all we need, but correct me if I am wrong.

For the hardware I attach the two pages of the schematics.

Please tell us why Mscale only recognizes 2GB of RAM with one chip select configuration and does not recognize the whole 4GB when we configure with 2 chip selects. Do you think is it soldering or not (at least one pin is not attached well

on a channel)?

 

Thanks,

Andras

 

 

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1,557 Views
Rita_Wang
NXP TechSupport
NXP TechSupport

Hi @Andras_Magyar ,

I see 4GB is read in your side.

Here you said:

"

We use the config tool because it is easy to configure the LPDDR4 there (respect to the excel RPA file) that generates us the .ds file that we can feed in to the Mscale DDR tool. With Mscale tool we calibrate the memory that generates us the timing.c file that we put into the bootloader.

"

Here I do not know if is you are using these two tool together cause this problem, here recommend you to use the config tool to configurate and then also use it to do the stress test.

Or you use the i.MX 8M Family DDR Tool Release - NXP Community this script to configurate the ddr parameters and then use this tool to do the test.

And then share us you test result.

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1,644 Views
Andras_Magyar
Contributor I

Hi,

One additional note is that our memory part number:

MT53E1G32D2FW-046 AAT:C

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1,594 Views
Rita_Wang
NXP TechSupport
NXP TechSupport

I am a bit confused about your using, here recommend you use the Config tool configuration the DDR paramaters and do the stress test, or use the MScale tool to configuration the DDR paramaters and then use it to do the stress test. Then share us your test result.

And for the hardware connection we can not see clearly.

You can share us your clear connection to us.

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1,554 Views
Andras_Magyar
Contributor I

Hi Rita,

 

When we tried the stress test or other tests with the config tools it also failed the same way when we used this configuration (4GB). With 2GB (1 chip select) all tests are fine with both the config and the mscale tool as well. What do you think?

 

Thanks,

Andras

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1,459 Views
Rita_Wang
NXP TechSupport
NXP TechSupport

Dear @Andras_Magyar ,

Could you share your clear schematic to us, for the above supply we can not see clearly.

Thanks

Wish you have a nice day

Best Regards

Rita

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1,444 Views
Andras_Magyar
Contributor I

Hi Rita,

 

I also uploaded the schematics above.

Do you see it?

 

Thanks,

Andras

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1,402 Views
Rita_Wang
NXP TechSupport
NXP TechSupport

Hi @Andras_Magyar ,

Due to the labor holiday in our china, I will leave work now and back to work on the 7th May, I will help check it then.

If your questions is urgent you can try to creat new cases in our website, Support | NXP Semiconductors

If not urgent, you can wait for me back. Thanks.

Wish you have a nice day

Best Regards

Rita

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