imx8mq-evk 摄像头显示驱动出现rx fifo overflow错误

cancel
Showing results for 
Search instead for 
Did you mean: 

imx8mq-evk 摄像头显示驱动出现rx fifo overflow错误

544 Views
1541189572
Contributor III

我是将linux的关于摄像头显示驱动移植到一个实时操作系统里面。

1. 摄像头是ov5640,对应的驱动是ov5640_mipi_csi_v2.c文件,配置了i2c、clko2。可以正常控制摄像头。

2. mipi-csi,对应的驱动是mxc-mipi-csi2_yav.c,配置了lanes、src、gpr及三个时钟。

3. csi-bridge,对应的驱动是mx6s_capture.c,配置了csi-bridge的相关寄存器。

查询了社区其他关于rx fifo overflow的帖子,看到说是因为ddr的配置问题,我将该函数imx8_noc_init函数移植到实时操作系统上,但是同样的有该错误。

请问,是否还有其他的相关硬件需要进行设置。

csi-bridge的寄存器dump:

[     288.998010 00] CSI Control Register 1 is 11b0902

[     289.002992 00] CSI Control Register 2 is c0000000

[     289.008224 00] CSI Control Register 3 is 10a8

[     289.013195 00] CSI Control Register CSI RX Count Register is 9600

[     289.019909 00] CSI Status Register is 80004000

[     289.025054 00] CSI DMA Start Address Register is 0

[     289.030461 00] CSI DMA Transfer Size Register is 0

[     289.035867 00] CSI DMA Start Address Register FB1 is c03bc8e8

[     289.042147 00] CSI DMA Start Address Register FB2 is c03bc8e8

[     289.048512 00] CSI Frame Buffer Parameter Register is 0

[     289.054355 00] CSI Image Parameter Register is 50002d0

[     289.060197 00] CSI Control Register 18 is bc4ad030

mipi csi的寄存器dump:

[   55.295810] MIPI CSI2 HC register dump, mipi csi1

[   55.300544] MIPI CSI2 HC num of lanes     0x100 = 0x1

[   55.305913] MIPI CSI2 HC dis lanes        0x104 = 0xc

[   55.311091] MIPI CSI2 HC BIT ERR          0x108 = 0x0

[   55.316378] MIPI CSI2 HC IRQ STATUS       0x10C = 0x8

[   55.321547] MIPI CSI2 HC IRQ MASK         0x110 = 0x1ff

[   55.326950] MIPI CSI2 HC ULPS STATUS      0x114 = 0x0

[   55.332117] MIPI CSI2 HC DPHY ErrSotHS    0x118 = 0x0

[   55.337399] MIPI CSI2 HC DPHY ErrSotSync  0x11c = 0x0

[   55.342567] MIPI CSI2 HC DPHY ErrEsc      0x120 = 0x0

[   55.347849] MIPI CSI2 HC DPHY ErrSyncEsc  0x124 = 0x0

[   55.353018] MIPI CSI2 HC DPHY ErrControl  0x128 = 0x0

[   55.358248] MIPI CSI2 HC DISABLE_PAYLOAD  0x12C = 0x0

[   55.363415] MIPI CSI2 HC DISABLE_PAYLOAD  0x130 = 0x0

[   55.368696] MIPI CSI2 HC IGNORE_VC        0x180 = 0x1

[   55.373862] MIPI CSI2 HC VID_VC           0x184 = 0x1

[   55.379090] MIPI CSI2 HC FIFO_SEND_LEVEL  0x188 = 0x40

[   55.384348] MIPI CSI2 HC VID_VSYNC        0x18C = 0x0

[   55.389631] MIPI CSI2 HC VID_SYNC_FP      0x190 = 0x0

[   55.394799] MIPI CSI2 HC VID_HSYNC        0x194 = 0x0

[   55.400026] MIPI CSI2 HC VID_HSYNC_BP     0x198 = 0x0

3 Replies

271 Views
weidong_sun
NXP TechSupport
NXP TechSupport

Hi,

  ov5640在i.MX8mq平台上,linux和android都不会出现RX FIFO 的溢出问题。因为OV5640的数据量量不大,内存带宽足够满足这个数据量的要求。

  曾经出现过的RX FIFL溢出问题,是发生在4K@30Fps以上分辨率的情况下,这个原因是因为DDR带宽不够造成的,而不是DDR的配置问题。

  从您的描述情况看,您对I.MX8MQ的MIPI驱动已经比较熟悉了,所以移植driver到另一个实时OS的工作,需要您自己去完成,我们这里能够帮上忙不多,因为我们也没有类似的方案。

   如果您使用的是QNX或者Vxworks,您需要联系一下他们原厂,可能他们做过相关的驱动程序。

----------------------------------

       On the i.mx8mq platform, Linux and Android will not overflow RX FIFO. Because the data volume of ov5640 is small, the memory bandwidth is enough to meet the requirements of this data volume.

      The RX fifl overflow problem occurred when the resolution is above 4K @ 30fps. This is caused by the lack of DDR bandwidth, not the DDR configuration problem.

      From your description, you are quite familiar with the Mipi driver of i.mx8mq, so you need to migrate the driver to another real-time OS by yourself. We are not very helpful here, because we do not have a similar solution.

If you are using QNX or VxWorks, you need to contact their original factory. Maybe they have made relevant drivers.

---------------------------------

Have a nice day!

BR,

Weidong

0 Kudos

271 Views
1541189572
Contributor III

hello,这个问题已经解决了,不过仍然有些疑问。

我看csi-bridge的文档配置rx fifo dma的起始地址要求double words aligned就可以了,但是实际上配置成双字节对齐会出现rx fifo overflow。

最后我改成page aligned就可以正确的获取图像了。

271 Views
1541189572
Contributor III

好的,多谢!

0 Kudos