imx8mq SD card boot not working

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imx8mq SD card boot not working

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marekbelisko
Contributor II

Hello, we're developing custom SOM based on imx8mq module. We verified boot from emmc which works fine by flashing image using uuu utility. We also have SD card on uSDHC2 but when SD card is flashed manually using dd image won't start booting. We checked with scope and following was measured:

LeCroy1-note.jpg

Clock seems to be also strange. Do you have any ideas what we can check? Is there possibility to change pinmux in some early stage when bootrom start fetching image (just hypothetical question)? Thanks.

 

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marekbelisko
Contributor II

Hi Igor,

Thanks for reply. Yes board pass DDR init as same image can boot from emmc and we generate ddr training from official nxp memory tool.

I checked fuses and it says:


USDHC_PAD_SET
TINGS
0x490[31:24]
NAND_PAD_SETT
IN GS
0x4A0[31:24]
OEM Override values for
the SD/MMC and
NAND boot modes
No 00000000 Override the
following IO PAD
settings:
[1:0] Driver
Strength
[2] Slew Rate
[3] Hysteresis
[4] Pull/Keeper
select
[6:5] Pull up/down
config
[7] Reserved.
USDHC_OVERRID
E_PAD_SETTING
S
0x490[17]
OEM Overrides the HYS
bit for the SD pads
No 0 Override the IO

so it's for pads configs (pull up/down etc) but can I change pinmux of pin like attach it to alt config or so? Thanks.

 

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igorpadykov
NXP Employee
NXP Employee

>so it's for pads configs (pull up/down etc) but can I change pinmux of pin like attach it to alt config or so?

 

sorry pinmux of pin can not be changed.

 

Best regards
igor

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igorpadykov
NXP Employee
NXP Employee

Hi Marek

 

had board passed ddr test and image was updated with new DDR initialization code according to MSCALE_DDR_Tool_User_Guide

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8M-Family-DDR-Tool-Release/ta-p/110...

 

> Is there possibility to change pinmux in some early stage when bootrom start fetching image..

 

yes. One can look at fuse 0X490[31:24]  USDHC pad setting override

"Override pad settings default if 0X490[17] is set" described in Table 6-14. USDHC boot eFUSE descriptions i.MX 8M Dual/8M QuadLite/8M Quad Applications Processors Reference Manual

 

Best regards
igor

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