Dear NXP,
My platform: imx8mplus +MT53D512M32D2DS-053 WT:D (LPDDR4)
Please refer the MX8M_Mini_LPDDR4_RPA_v18 (1).xlsx file.
We are going to do DDR signal simulation. Please provide information as follows:
(1) Data rate
(2) Drive strength setting for read and write
(3) ODT setting of read and write (if ODT enabled)
Hi Albert
for supported datarates one can look at Table 9-1. DRAM controller supported SDRAM configurations
i.MX 8M Plus Applications Processor Reference Manual
Other parameters, like drive strength can be found experimentally based on ibis modelling
one can follow sect.3.4.3 i.MX 8M Plus DDR SI simulation guide
i.MX 8M Plus Hardware Developer’s Guide
Best regards
igor