Hi,
We are working on a custom board based on iMX8MP chipset, derivated from the evaluation board EVK-IMX8MP.
We have two options for the LPDDR4, 6 GByte (the same than the EVK) and 2 GByte.
For the 6 GByte option it works fine. We compile u-boot, atf, generate flash.bin with imx-mkimage and load flash.bin in a SD:
U-Boot SPL 2020.04-g0ca99a48-dirty (Sep 02 2021 - 11:13:29 +0200)
Normal Boot
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0
NOTICE: BL31: v2.2(release):rel_imx_5.4.70_2.3.2_rc1-0-g2a2678646-dirty
NOTICE: BL31: Built : 15:01:32, Sep 1 2021
U-Boot 2020.04-g0ca99a48-dirty (Sep 02 2021 - 11:13:29 +0200)
CPU: i.MX8MP[8] rev1.1 1600 MHz (running at 1200 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 25C
Reset cause: POR
.
.
But for second DDR option it is not starting. We have used NXP DDR tools to detect and calibrate this new memory, and port the result to our custom board files. The SPL performs the DDR training fine, but when trying to load atf image it does reboot.
U-Boot SPL 2020.04-g0ca99a48-dirty (Sep 02 2021 - 12:01:58 +0200)
Normal Boot
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0
U-Boot SPL 2020.04-g0ca99a48-dirty (Sep 02 2021 - 12:01:58 +0200)
Normal Boot
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0
U-Boot SPL 2020.04-g0ca99a48-dirty (Sep 02 2021 - 12:01:58 +0200)
Normal Boot
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0
What else is needed to port this new memory ?
Do we need to do some porting in the atf ?
Best regards
Angel
hello @AngelF Can you look in to this...
Hi Igor,
Thank you very much for your reply.
Best regards
Angel
Hi Angel
one can try to build without OP-TEE using sect.5.6.10 OP-TEE enablement i.MX Yocto Project User’s Guide
additional details were sent via mail.
Best regards
igor