imx8mp lpddr stress test config

[jiangyaqiang]

Hi everyone:

I face a problem with imx8mp ddr stress test, when I set the vref to 0x14(which is the default value in MX8M_Plus_LPDDR4_RPA_v6), the stress test will fail,  after I change to  0x10 the stress test pass.

here is the description in MX8M_Plus_LPDDR4_RPA_v6

PhyVref  0x14  Initial value used for VREF. The value is updated following data training.

and in lpddr4_timimg.c it sets the value of 0x54006.

My question is ：

1. where is 0x54006 set to ? I can find the register in reference manual

2. why the default value is set to 0x14 ? the value comes from what ?

 Best Regards

[igorpadykov]

Hi Yaqiang

1. it is used by integrated PHY microcontroller unit for DRAM initialization and calibration.

Sorry its description is not available for customers.

2. 0x14 value comes from technical requirements of that microcontroller.

Best regards
igor

[jiangyaqiang]

HI igorpadykov:

Thanks for you reply.

But according to my board I need to modify it for stable, by the way , my board is runing at 1800M(ddr stress test fail at 2000M).

So I want to know how to change to value in theory。

Our board layout reference to doc "IMX8MPHDG-i.MX 8M Plus Hardware Developer’s Guide (REV 0)".

[igorpadykov]

VREF training is used to determine a range of VREF values where memory interface (write and read) is
stable and then find out an optimum write and read eye position.
VREF training is performed automatically during DRAM initialization by the DDR PHY.

Best regards
igor

[jiangyaqiang]

HI igor:

   Thanks. I understand your message. But how to find out the exaclty value on my board ? Try a value and test the write and read eye pattern and run the dress test  ? 

Best Regards.

[igorpadykov]

to check the trained Vref value - one can perform a mode register read after the trainings are finished and see what are the contents of LPDDR4 MR14.

Best regards
igor

[jiangyaqiang]

HI igor:

I found that the vref is relative to the voltage of the ddr. higher VOL higher vref, but I don't know how to cacluate it.

I don't care the value about train, but I want to know what value I need to set to train the ddr.

the default value is 0x14(see bellow) in file "MX8M_Plus_LPDDR4_RPA_v6.xml", why it's 0x14 ? 

[igorpadykov]

0x14 value comes from technical requirements of that microcontroller as optimal.

Best regards
igor