imx8mp-evk USB PHY initialization

[chaehee]

I am creating a USB driver on the Zephyr OS.

Currently USB2 (high speed) is working but USB3 (super speed) is not working. I think USB3 PHY is not working correctly. I found below in the IMX8MPRM document section 11.3.2.9 Fixed RX Equalization.

The PHY can be configured for fixed equalization by
programming relevant control registers in the USB 3.0 femtoPHY as follows.
1. Write 1'b0 to RX_OVRD_IN_HI.RX_EQ_EN [address 16'h1006: bit 6].
2. Write 1'b1 to RX_OVRD_IN_HI.RX_EQ_EN_OVRD [address 16'h1006: bit 7].
3. Write a fixed value to RX_OVRD_IN_HI.RX_EQ [address 16'h1006: bits 8–10]
[equalization setting] (generally 2–4, based on testing in customer environment).
4. Write 1'b1 to RX_OVRD_IN_HI.RX_EQ_OVRD [address 16'h1006: bit 11].
The RX_OVRD_IN_HI is a PHY internal register and accessed through the register in
the USB controller. See PHY Register Control (PHY_CRCTL) in the Universal Serial
Bus Controller (USB) chapter for details of how to update a USB PHY register. In the
above steps, the register RX_OVRD_IN_HI will be written four times. The software
must also read the RX_OVRD_IN_HI register first and keep other bits the same while
updating specific bits.

I don't know how to access this register. Can you explain where I can find this information?

Do you have any sample code to access this register?

[chaehee]

Hi Salas,

Actually, my question is not related with Zephyr OS. 

My question is USB PHY initialization which mentioned in the IMX8MPRM documentation. How can I access the RX_OVRD_IN_HI register which is a PHY internal register. I could not find more information of the RX_OVRD_IN_HI register in the IMX8MPRM documentation.

Can you help how I can access this register?

[Manuel_Salas]

Hello @chaehee 

You can check the memory map on the reference manual:

You can see for USB1 the address is 3810_0000 and offset to RX_OVRD_IN_HI is 1006 as described in chapter 11.2.4 Initialization/application information:

So,

USB1: 0x38101006

USB2: 0x38201006

Best regards,

Salas.

[chaehee]

Hi Salas,

When I read RX_OVRD_IN_HI register at 0x38101006, value of register is always 0. Is it write access only register? 

According to 11.2.5.1.1 DWC_usb3 memory map, there is no register at the offset 0x1006. Is it undocumented register?

I also access offset 0x1006 of the USB GLUE register (address 0x381f1006) and value of register is always 0. 

Please confirm RX_OVRD_IN_HI register address is correct.

[Manuel_Salas]

Hello @chaehee 

I hope you are doing very well.

I double check, and there is not a specific memory map register for RX_OVRD_IN_HI because it is a PHY register.

From internal team, you can access to RX_OVRD_IN_HI as below:

# echo 0x1006 > /sys/kernel/debug/phy/phy-382f0040.usb-phy.3/phy-382f0040.usb-phy.3/ctrl_reg_base
# echo 1 > /sys/kernel/debug/phy/phy-382f0040.usb-phy.3/phy-382f0040.usb-phy.3/ctrl_reg_count
# echo 0xB80 > /sys/kernel/debug/phy/phy-382f0040.usb-phy.3/phy-382f0040.usb-phy.3/ctrl_reg_value

# cat /sys/kernel/debug/phy/phy-382f0040.usb-phy.3/phy-382f0040.usb-phy.3/ctrl_reg_value
Control Register 0x1006 value is 0x b80

This is from Linux.

Best regards,

Salas.

[chaehee]

Hello @Manuel_Salas,

I can access RX_OVRD_IN_HI register now.  

According to initialization step 3, I can set RX_OVRD_IN_HI.RX_EQ to 2~4 based on customer environment. I tried to set this to 2, 3, and 4 but I still have USB3 issue.

Do you know what value I need to set this?

[chaehee]

Hi @Manuel_Salas,

Did you see my previous message?

Can I have the USB 3.0 femtoPHY register map and description? Actually, I contacted to Synopsys to get femtoPHY register map and description, but he said I need to get it from NXP because the IP is configurable.

[Manuel_Salas]

Hello @chaehee 

I hope you are doing very well.

Unfortunately, this support channel does not support Zephyr OS directly.

You can contact to our Professional Services to get more information.

Best regards,

Salas.