imx8mp ethernet mdio clock

[AngelF]

Hello,

We have our own design based on imx8mp and kernel 6.6.23 from NXP.
We also have the ethernet interface, and this is the device tree configuration:

&fec {

pinctrl-names = "default";

pinctrl-0 = <&pinctrl_fec>;

phy-mode = "rmii";

phy-handle = <&ethphy0>;

phy-supply = <&reg_on_veth>;

status = "okay";

mdio {

#address-cells = <1>;

#size-cells = <0>;

ethphy0: ethernet-phy@0 {

compatible = "ethernet-phy-ieee802.3-c22";

reg = <0>;

nxp,rmii-refclk-in;

smsc,disable-energy-detect;

};

};

};

pinctrl_fec: fecgrp {

fsl,pins = <

MX8MP_IOMUXC_SAI1_MCLK__ENET1_TX_CLK 0x0000001f

MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x00000106

MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x00000106

MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x00000091

MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x00000091

MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x0000001f

MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x0000001f

MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x0000001f

MX8MP_IOMUXC_SAI1_TXD6__ENET1_RX_ER 0x00000106

MX8MP_IOMUXC_SAI1_TXD7__ENET1_TX_ER 0x00000106

MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x00000091

>;

};

We have a problem with the "ifconfig eth0 down" command. Most of the time the signal ENET1_MDC (AH9) stays high and sometimes low.

We need to make sure that this signal goes low. When this signal is high and supply to PHY is removed, some milliamps are driven through this pin.

Best regards

Angel

[AngelF]

Hello,

Thank you for your answer.

I have added pinctrl handle for sleep and it seems to drive pin to low, both when I set the interface down and when I enter standby mode.

Best regards and thank you

[JosephAtNXP · Accepted solution]

Hi,

Thank you for your interest in NXP Semiconductor products,

You can try to add another pinctrl handle for sleep and when the interface is down, write to the MDC pin as GPIO through filesystem.

Regards