imx8mm spi chip select doesnt stay low

[dpog]

I'm facing a problem probably with the spi driver. I'm trying to read and write to an eeprom, but when the read process starts, the chip select does not stay low, but returns to high and deselects the chip after each transfered byte. As a result, the eeprom stops the reading and so only sends the first byte.

I already read the suggestion to use the cs-gpio property in the device tree, but I noticed no difference in the behaviour. Am I missing something or need to do some more config? 

In the read/write operations I set cs_change to 0, but it has no effect.

[AldoG]

Hello,

Could you share your device tree?
Also, please share the BSP version that you’re using.

Best regards,
Aldo.

[dpog]

The used BSP is 5.4.147-imx, if that's the version you're asking.
The device tree looks as follows:
spi_b: &ecspi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spib>;
cs-gpios = <&gpio5 9 0>;

spidev@0 {
compatible = "linux,spidev";
spi-max-frequency = <10000000>;
reg = <0>;
};
};

pinctrl_spib: spibgrp {
fsl,pins = <
MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x116
MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x116
MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x116
MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x156
>;
};

[AldoG]

Hello,

Thank you for providing more information, you may take the i.MX8MN dts as a reference for this I see that you are missing some bindings:
https://github.com/nxp-imx/linux-imx/blob/imx_5.4.47_2.2.0/arch/arm64/boot/dts/freescale/imx8mn-evk....

&ecspi2 {
        #address-cells = <1>;
        #size-cells = <0>;
        fsl,spi-num-chipselects = <1>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>;
        cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
        status = "okay";

        spidev0: spi@0 {
                reg = <0>;
                compatible = "rohm,dh2228fv";
                spi-max-frequency = <500000>;
        };
};

pinctrl_ecspi2: ecspi2grp {
                        fsl,pins = <
                                MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK                0x82
                                MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI                0x82
                                MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO                0x82
                        >;
                };

                pinctrl_ecspi2_cs: ecspi2cs {
                        fsl,pins = <
                                MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13                0x40000
                        >;
                };

Best regards,
Aldo.

[dpog]

Hello @AldoG,

thanks for your reply. I applied your suggestion, but I still got the same result. Is there some other way, that I may achive a Chip Select that stays low?