imx8mm-lpddr4 eFuse settings for ecspi2

[vignesh-baskaran]

Hi,

We were trying to boot from ecspi2 which connected via ecspi2 GPIO. We changed dtb for  ecspi2 and able to see device at user-space as MTD1. (MT25QL02GCBB8E12-0SIT)

Now we trying to boot the device, We facing issue here.

1.) We having issues in understanding the fuse bank and word fields, Since its One Time Programmable we want know exact command to change eFUSE boot to boot from ecspi2. can we get exact command to program it?  

2.) We are trying to flash the ecspi2 device. i cant see any command in uuu to flash ecspi2. how can we achieve that?

Thanks

[Sanket_Parekh]

Hello @vignesh-baskaran 

I hope you are doing well.

->i.MX8m mini supports booting from serial memory devices, such as EEPROM and serial flash, using the SPI.
for serial boots there is ecspi interface is available

->fuse BOOT_CFG[11:9] -> ECSPI port selection -> set this pin 001 for ecspi2.
For more detail please refer to 6.1.5.5.1 Serial(SPI) NOR eFUSE configuration
https://www.nxp.com/webapp/Download?colCode=IMX8MMRM

Please refer to this 4.4.1.4 Flashing U-Boot on SPI-NOR from U-Boot
https://www.nxp.com/docs/en/user-guide/IMX_LINUX_USERS_GUIDE.pdf

Thanks & Regards.

Sanket Parekh

[vignesh-baskaran]

Hi @Sanket_Parekh,

We were unable to open the link you send "https://www.nxp.com/webapp/Download?colCode=IMX8MMRM". it showing "The collateral download information was not found in the session".

Can you send alternative link?

Thanks

[vignesh-baskaran]

Hi @Sanket_Parekh,

Any update on this one?

Since its One Time Programmable we want know exact u-boot command to change eFUSE boot to boot from ecspi2.

Thanks

[Sanket_Parekh]

Hi @vignesh-baskaran,

Please accept my apologies for the delay in response.

For the reference manual, there is no alternative link available, one should use below provided link.

->fuse BOOT_CFG[11:9] -> ECSPI port selection -> set this pin 001 for ecspi2.
For more detail please refer to 6.1.5.5.1 Serial(SPI) NOR eFUSE configuration in RM
https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-proces...

Please refer to this 4.4.1.4 Flashing U-Boot on SPI-NOR from U-Boot
https://www.nxp.com/docs/en/user-guide/IMX_LINUX_USERS_GUIDE.pdf

Thanks & Regards,
Sanket Parekh

[vignesh-baskaran]

Hi @Sanket_Parekh ,

For Reference we were following this link "https://community.nxp.com/t5/i-MX-Processors/OCOTP-write-support-on-i-mx8m/m-p/825028". 

+FB: ucmd fuse prog -y 0 708 0xa295fc11

 i can able to see they follow fuse row index.

 but in our case fuse row index is missing ?

 Can you please clarify on this one?

Thanks,

Vignesh

[vignesh-baskaran]

Hi @Sanket_Parekh,

Were  referring https://community.nxp.com/t5/i-MX-Processors/imx8mini-emmc-efuse/m-p/932906 link.

For us.

u-boot=> fuse sense 1 3 1
Sensing bank 1:

Word 0x00000003: 08000000

 1 ) We can able to see the 0x470[27] reserved bit is enabled. Can you please clarify on this one?

    2 ) We were trying to boot from ecspi2. what are the other things we should consider while eFUSE?

Thanks,

Vignesh.

[vignesh-baskaran]

Hi,

Do you have any updates on this?

Can you confirm this one please?

Regards,

Vignesh.

[Sanket_Parekh]

Hello @vignesh-baskaran 

I apologize for the delay.

->Please Use the link that is shared
https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-proces...
https://www.nxp.com/docs/en/user-guide/IMX_LINUX_USERS_GUIDE.pdf

->I have also shared a few required configurations, Please take a look at it.

Please refer to this link for ucmd fuse prog
https://community.nxp.com/t5/i-MX-Processors/FUSE-burn-automation-on-iMX8QXP-UUU-FB-ucmd-fuse-prog/t...

1)We can able to see the 0x470[27] reserved bit is enabled. Can you please clarify this one?
->Yes,it is clearly mentioned that 0x470[27] bit of fusemap is reserved.

2)We were trying to boot from ecspi2. what are the other things we should consider while eFUSE?
->Please take a look at the OTP memory footprint which shows the shadow regs that need to be reserved there is also shared that Shadow regs should be used for boot-cfg purposes.

Thanks & Regards.

Sanket Parekh

[vignesh-baskaran]

Hi @Sanket_Parekh ,

We trying to form the word for eFUSE,

We come up with,

0x470[7:0] -> 0000 0000
0x470[15:8] -> 0110 0010

so,
0x470[15:0] -> 0x6200
----------------------------------------------
0x470[27:16] -> 0000 0000 0000
0x470[28] -> 1 -boot mode from fuses
0x470[31:29] -> 000

so,
0x470[31:16]-> 0x1000
------------------------------------------------------
so,
0x470[31:0] -> 0x1000 6200

We also have a doubt regarding the same

We Have some confusion regarding the chip select.

&iomuxc {
 pinctrl_ecspi2: ecspi2grp {
 fsl,pins = <
 MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x40000
 MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
 >;
 };

 1) Can you confirm the chip select we choose is correct or not?

   2) if chip select is 0, then  0x470[31:0] -> 0x1000 6200 is correct?

[vignesh-baskaran]

Hi @Sanket_Parekh,

Got any info on this one?

what is the use of CS select bit in 0x470? Can you let us know please?

[vignesh-baskaran]

Hi @Sanket_Parekh,

This is critical issue for us . Can you Please let us know CS select bit in 0x470?

Thanks.

[Sanket_Parekh]

Hello @vignesh-baskaran 

I hope you are doing well.
I apologize for the delay in reply, please accept my apology.

1)Can you confirm the chip select we choose is correct or not?
->Yes, this chip selection you choose is correct.
->one can select cs select as per its usage for cs1 01 , cs2 10 & cs3 11 , So that is correct.

2)if chip select is 0, then  0x470[31:0] -> 0x1000 6200 is correct?
->Please refer to the screenshot I've shared.
->One can set the value, for example, cs0 then the value should be ox470[15:0] is 6 & if the rest are set to 0 which is reserved any way and make 28th bit 1 if the Boot mode configuration is taken from fuses & 29th bit if one wants a higher level of security should burn this. and rest 30 a7 31st bit are reserved.
->Please cross-check the value as per your need.

3)what is the use of CS select bit in 0x470? Can you let us know please?
->In the Serial peripheral device interface there is one master and more than one slave so, if the master wants to send the data to its slave then this chip select bit is used to identify which slave is should send the data.

Thanks & Regards.

Sanket Parekh

[vignesh-baskaran]

Hi,

We programmed eFUSE using the following command.

fuse prog 1 3 10006200

After that we were unable to boot from eMMC or QSPI. with sw1101 as 01

and also we already ported SD image to ecspi2, but if we kept sw1101 as 00 , We were unable to see ecspi2 booting also.

[vignesh-baskaran]

Hi @Sanket_Parekh ,

Got any info on  this one?

[Sanket_Parekh]

Hello @vignesh-baskaran 

I hope you are doing well.

fuse prog 1 3 10006200
This command is correct.

->also already ported the SD image to ecspi2, but if we kept sw1101 as 00, we could not see ecspi2 booting also.
-Please make sure that IVT (image vector table) is different for both the SD card and ecspi, one can check the offset for the SD card or for the other in the RM.
-That is why it's not getting booted.
https://www.nxp.com/webapp/Download?colCode=IMX8MMRM&_gl=1*8yx3si*_ga*MTIxOTcwMzYyMy4xNjc5NDg2MDYw*_.....

Thanks & Regards.

Sanket Parekh

[vignesh-baskaran]

Hi @Sanket_Parekh,

Thanks for confirming the eFUSE Values.

We consider the IVT (image vector table) for ECSPI.

 

$ dd if=imx-boot-imx8mm-lpddr4-evk-sd.bin-flash_evk of=/dev/mtd1 bs=1k seek=1

We used same image used for SD card boot.

We loaded this u-boot before writing value into eFUSE.

We were confused why its not booting.

We connected CRO at clk while booting after eFUSE values written while keeping sw1101 as 00.

At CLK:

At MISO:

We were unable to see any output in console.

is offset => bs=1k seek=1 correct?

is There any other reason for this?