imx8m mini uart4

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imx8m mini uart4

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story
Contributor II

Uboot:2018.03

Kernel : 4.14.98

I tested it on the official imx8mmini evk. When I modified dts and added uart4, the system will crash.

The board we made also has this problem.

The added code is as follows:

pinctrl_uart4: uart4grp {
fsl,pins = <
MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
>;
};


&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
assigned-clocks = <&clk IMX8MM_CLK_UART4_SRC>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
status = "okay";
};

log:

[ 0.962367] workingset: timestamp_bits=44 max_order=19 bucket_order=0
[ 0.981726] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 0.985327] NFS: Registering the id_resolver key type
[ 0.989843] Key type id_resolver registered
[ 0.994013] Key type id_legacy registered
[ 0.998253] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
[ 1.004905] jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
[ 1.011461] 9p: Installing v9fs 9p2000 file system support
[ 1.020828] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 244)
[ 1.025449] io scheduler noop registered
[ 1.029488] io scheduler cfq registered (default)
[ 1.034157] io scheduler mq-deadline registered
[ 1.038632] io scheduler kyber registered
[ 1.052572] pwm-backlight lvds_backlight@0: lvds_backlight@0 supply power not found, using dummy regulator
[ 1.063797] imx-sdma 30bd0000.dma-controller: no iram assigned, using external mem
[ 1.070903] imx-sdma 30bd0000.dma-controller: Falling back to user helper
[ 1.073872] imx-sdma 302c0000.dma-controller: no iram assigned, using external mem
[ 1.087681] imx-sdma 302b0000.dma-controller: no iram assigned, using external mem
[ 1.098778] mxs-dma 33000000.dma-apbh: initialized
[ 1.102886] Bus freq driver module loaded
[ 1.110962] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[ 1.117301] SuperH (H)SCI(F) driver initialized
[ 1.120187] 30860000.serial: ttymxc0 at MMIO 0x30860000 (irq = 30, base_baud = 5000000) is a IMX
[ 1.128872] 30880000.serial: ttymxc2 at MMIO 0x30880000 (irq = 31, base_baud = 5000000) is a IMX
[ 1.137451] 30890000.serial: ttymxc1 at MMIO 0x30890000 (irq = 32, base_baud = 1500000) is a IMX
[ 1.148423] console [ttymxc1] enabled
[ 1.148423] console [ttymxc1] enabled
[ 1.152917] bootconsole [ec_imx6q0] disabled
[ 1.152917] bootconsole [ec_imx6q0] disabled
[ 1.162380] Synchronous External Abort: synchronous external abort (0x96000210) at 0xffff00000bbe0080
[ 1.173488] Internal error: : 96000210 [#1] PREEMPT SMP
[ 1.178712] Modules linked in:
[ 1.181772] CPU: 2 PID: 1 Comm: swapper/0 Not tainted 4.14.98-myd-imx8mm-test-dev+g1ea6424 #1
[ 1.190295] Hardware name: FSL i.MX8MM EVK board (DT)
[ 1.195345] task: ffff8000763b0000 task.stack: ffff000008078000
[ 1.201273] PC is at serial_imx_probe+0x2f0/0x618
[ 1.205976] LR is at serial_imx_probe+0x2e0/0x618
[ 1.210679] pc : [<ffff00000862d178>] lr : [<ffff00000862d168>] pstate: 40000045
[ 1.218072] sp : ffff00000807bbf0
[ 1.221385] x29: ffff00000807bbf0 x28: ffff00000962cad8
[ 1.226699] x27: 0000000000000007 x26: ffff800076d8eb00
[ 1.232012] x25: 00000000fffffffa x24: 00000000fffffffa
[ 1.237325] x23: 0000000000000024 x22: ffff8000767b4800
[ 1.242638] x21: ffff8000767b4810 x20: 0000000000000000
[ 1.247951] x19: ffff800076dbd418 x18: 0000000000000001
[ 1.253264] x17: 0000000000000001 x16: 0000000000000000
[ 1.258577] x15: ffffffffffffffff x14: ffffffffffffffff
[ 1.263890] x13: 0000000000000038 x12: 0101010101010101
[ 1.269203] x11: 0000000000000020 x10: 0101010101010101
[ 1.274516] x9 : 0000000000000000 x8 : ffff800076d8ec80
[ 1.279828] x7 : 0000000000000000 x6 : 000000000000003f
[ 1.285141] x5 : 0000000000000000 x4 : ffff00000984a220
[ 1.290454] x3 : 0000000000000000 x2 : ffff00000bbe0080
[ 1.295766] x1 : ffff8000763b0000 x0 : ffff00000bbe0000
[ 1.301080] Process swapper/0 (pid: 1, stack limit = 0xffff000008078000)
[ 1.307779] Call trace:
[ 1.310226] Exception stack(0xffff00000807bab0 to 0xffff00000807bbf0)
[ 1.316667] baa0: ffff00000bbe0000 ffff8000763b0000
[ 1.324497] bac0: ffff00000bbe0080 0000000000000000 ffff00000984a220 0000000000000000
[ 1.332326] bae0: 000000000000003f 0000000000000000 ffff800076d8ec80 0000000000000000
[ 1.340155] bb00: 0101010101010101 0000000000000020 0101010101010101 0000000000000038
[ 1.347985] bb20: ffffffffffffffff ffffffffffffffff 0000000000000000 0000000000000001
[ 1.355814] bb40: 0000000000000001 ffff800076dbd418 0000000000000000 ffff8000767b4810
[ 1.363643] bb60: ffff8000767b4800 0000000000000024 00000000fffffffa 00000000fffffffa
[ 1.371473] bb80: ffff800076d8eb00 0000000000000007 ffff00000962cad8 ffff00000807bbf0
[ 1.379303] bba0: ffff00000862d168 ffff00000807bbf0 ffff00000862d178 0000000040000045
[ 1.387133] bbc0: ffff00000807bbe0 ffff00000855cff4 ffffffffffffffff 0000000000000000
[ 1.394961] bbe0: ffff00000807bbf0 ffff00000862d178
[ 1.399840] [<ffff00000862d178>] serial_imx_probe+0x2f0/0x618
[ 1.405589] [<ffff0000086dac18>] platform_drv_probe+0x58/0xb8
[ 1.411337] [<ffff0000086d8ff8>] driver_probe_device+0x210/0x2d0
[ 1.417343] [<ffff0000086d9174>] __driver_attach+0xbc/0xc0
[ 1.422831] [<ffff0000086d7154>] bus_for_each_dev+0x4c/0x98
[ 1.428403] [<ffff0000086d8910>] driver_attach+0x20/0x28
[ 1.433714] [<ffff0000086d8460>] bus_add_driver+0x1b8/0x228
[ 1.439287] [<ffff0000086d9b10>] driver_register+0x60/0xf8
[ 1.444772] [<ffff0000086dab68>] __platform_driver_register+0x40/0x48
[ 1.451217] [<ffff00000954cf28>] imx_serial_init+0x38/0x5c
[ 1.456705] [<ffff000008083c90>] do_one_initcall+0x38/0x128
[ 1.462280] [<ffff000009500d0c>] kernel_init_freeable+0x188/0x22c
[ 1.468377] [<ffff000008e6a538>] kernel_init+0x10/0x108
[ 1.473602] [<ffff000008084ed8>] ret_from_fork+0x10/0x18
[ 1.478917] Code: 2a0003f4 35001620 f9400a60 91020002 (b9400041)
[ 1.485021] ---[ end trace fc43bd6dd062a194 ]---
[ 1.489672] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
[ 1.489672]
[ 1.498806] SMP: stopping secondary CPUs
[ 1.502731] Kernel Offset: disabled
[ 1.506219] CPU features: 0x080200c
[ 1.509706] Memory Limit: none
[ 1.512762] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
[ 1.512762]

Can you help analyze the reasons? This behavior can also occur when I close all other peripherals.

Labels (1)
16 Replies

6,635 Views
thiago_machado
Contributor III

Thanks for the quick response @BiyongSUN! First let me give some information about my build enviroment. I'm working with Yocto 3.0 (Zeus) and 5.4.47 kernel version for i.MX 8M Nano.

"for the 4.14.98.

Relatively. 

you need to change the  to... "

"Have you even changed the RDC in atf for uart4, which is assign to M4 by BSP default?"

I already tryed to make the sugested changes. Searching for the mentioned files on <build dir>/tmp/work/ running:

also tryed:

  • grep -r IMX_RDC_BASE
  • grep -r RDC

Also made the above seach on <build dir>/tmp/work-shared/imx8mn/kernel-source.

Till now, I've found nothing related. This M4sugestion (in my case, the uC is a M7) makes a lot of sense, but I'm feeling that i.MX 8M Nano has a equivalent source file to manage the RDC configuration. Am I write?

 

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6,609 Views
BiyongSUN
NXP Employee
NXP Employee

It doesn't matter M4 or M7. Let say A core side and M core side to cover all the i.MX8M family(i.MX8MQ, i.MX8MM, i.MX8MN, i.MX8MP).

If you check the i.MX8MN atf code, you can find it could say "the same".

rel_imx_5.4.47_2.2.0/imx-atf/tree/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c

 

static const struct imx_rdc_cfg rdc[] = {
	/* Master domain assignment */
	RDC_MDAn(RDC_MDA_M7, DID1),

	/* peripherals domain permission */
	RDC_PDAPn(RDC_PDAP_UART4, D1R | D1W),
	RDC_PDAPn(RDC_PDAP_UART2, D0R | D0W),

	/* memory region */
	RDC_MEM_REGIONn(16, 0x0, 0x0, 0xff),
	RDC_MEM_REGIONn(17, 0x0, 0x0, 0xff),
	RDC_MEM_REGIONn(18, 0x0, 0x0, 0xff),

	/* Sentinel */
	{0},
};

 

 

L5.4.24_2.1.0/imx-yocto-bsp/build-wayland-8mm/tmp/work/aarch64-mx8mm-poky-linux/imx-atf/2.2+gitAUTOINC+b0a00f22b0-r0/git/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c

is in my yocto build. 

If you don't have the atf, you could not generate the flash.bin. the bootloader.

As I said before, TroyKisky from boundarydevices in the loop, already answer the root cause. I also can check TroyKisky's reply. 

 

 

 

6,645 Views
BiyongSUN
NXP Employee
NXP Employee

 

 

Have you even changed the RDC in atf for uart4, which is assign to M4 by BSP default?

Here is the demo code changes for change the debug port to uart4 from uart2. 

and test is done on the i.MX8MM evk board.

How to Change i.MX8MM evk Linux Debug UART
https://community.nxp.com/t5/i-MX-Community-Articles/How-to-Change-i-MX8MM-evk-Linux-Debug-UART/ba-p...

 

 

 

--- rel_imx_5.4.70_2.3.0/imx-atf/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c 2021-01-20 09:43:53.000000000 +0800
+++ rel_imx_5.4.70_2.3.0_uart4/imx-atf/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c 2021-03-11 10:29:54.108931338 +0800
@@ -58,7 +58,7 @@
RDC_MDAn(RDC_MDA_M4, DID1),

/* peripherals domain permission */
- RDC_PDAPn(RDC_PDAP_UART4, D1R | D1W),
+ RDC_PDAPn(RDC_PDAP_UART4, D0R | D0W),
RDC_PDAPn(RDC_PDAP_UART2, D0R | D0W),

/* memory region */

 

 

6,644 Views
BiyongSUN
NXP Employee
NXP Employee

for the 4.14.98.

Relatively. 

you need to change the  to   

mmio_write_32(IMX_RDC_BASE + 0x518, 0xf3);

from 

from  mmio_write_32(IMX_RDC_BASE + 0x518, 0xfc);

which is for UART4  RDC settings from M4 domain 1 to A53 domain 0.

6,654 Views
thiago_machado
Contributor III

Hello all, I'm facing the exactly same problem!

I'd like to enable the UART4 for the IMX8M Nano, but I've not found yet no RDC Register configuration file in my build enviromentor. If the solution is to change the MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX register what would be it's the correct value?

Here's the changes I made so far

In arch/arm64/boot/dts/freescale/imx8mn-evk.dts

+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
+ MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
+ >;
+ };
+

-------

+&uart4 { /* RS232 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+

Inarch/arm64/boot/dts/freescale/imx8mn.dtsi

+ uart4: serial@30a60000 {
+ compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart";
+ reg = <0x30a60000 0x10000>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_UART4_ROOT>,
+ <&clk IMX8MN_CLK_UART4_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };

Best regards, Thiago.

 

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6,643 Views
BiyongSUN
NXP Employee
NXP Employee

actually,  TroyKisky  already gave clear answer.

7,528 Views
TroyKisky
Contributor II

I think this is caused by UART4 being allocated to the M4. You can disable UART4 in the dtb, or you

can

mw.l 303d0518 ff

before booting, or you can apply this patch

imx8mm_bl31_setup: allow uart4 from A53 processor · boundarydevices/imx-atf@fc36812 · GitHub 

BR

Troy

Tags (1)

5,503 Views
billchen
Contributor III

thanks for your help.  It solved the same problem in our company's  imx8mm board.

It is astonishing when I saw the kernel panic message.  At first , I found a lot articles mentioned uart4 was reserved for M4, I really worried about it. 

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jack-cap
Contributor III

Hello Troy,

      how to disable pwm4 on RDC module ? thanks for your reply !

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david_ochs1
Contributor III

Thank you, Troy! Applying the patch fixed the issue for me.

I'm using Yocto to do build the BSP; I had to run bitbake -f -c compile imx-atf in order for imx8mm_bl31_setup.c to show up in my file system so I could patch it. Then did bitbake -f -c compile imx-atf again, then rebuilt the image, and it worked.

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nelky22
Contributor I

Hi David,

How do you run bitbake -f -c compile imx-atf or where to you run it?

I am at my directory rm-n8mmi_smc and I run it.  I got this error

ERROR: Unable to acquire lock 'rm-n8mmi-bsp-source/sources/poky/build/bitbake.lock', directory is not writable

Please help.

Regards

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7,525 Views
david_ochs1
Contributor III

I'm seeing the same issue on my board. Did you find a solution?

Thanks,

Dave

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inkwaterman
Contributor II

Hi David,

did you resolve the issue ?

I have the same problem.. 

Thanks !

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igorpadykov
NXP Employee
NXP Employee

Hi 扬 杨 

uart4 may be used by m4 core as described in

linux/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk-m4.dts

fsl-imx8mm-evk-m4.dts\freescale\dts\boot\arm64\arch - linux-imx - i.MX Linux kernel 

also may be useful to check uart4 clock in clock driver:

clk-imx8mm.c\imx\clk\drivers - linux-imx - i.MX Linux kernel 

Best regards
igor
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story
Contributor II

Hi,

 1.

  I checked the file arch/arm64/boot/dts/freescale/fsl-imx8mm-evk-m4.dts and saw that uart4 is closed.
&uart4 {
Status = "disabled";
};

 2.     I didn't find out if the clock has a problem.

Have you tested uart4? Can you test it?
We can solve this problem together.

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igorpadykov
NXP Employee
NXP Employee

for clocks checking procedure one can look at gpt clock issue on

GPT capture sample on M4 seems to hang on Linux boot 

check (clk_register_gate2()) it in similar way.

Also uart4 is used on boundary devices nitrogen8mm board :

linux-imx6/imx8mm-nitrogen8mm.dts at boundary-imx_4.14.x_2.0.0_ga · boundarydevices/linux-imx6 · Git... 


Best regards
igor

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