the IMX8MDQLQRM chepter 10.1.4.4.1.3 (page 3347) sayWhen the SPI SS Wave Form Select (SS_CTL[3:0]) is set,the SS will negate between SPI bursts until the wait states finish
but it didnt work
i set the sample period control register to 5
devmem2 0x3083001c
/dev/mem opened.
Memory mapped at address 0xffff86795000.
Read at address 0x3083001C (0xffff86795018): 0x0000000500000083
the SS_CTL[3:0] is 1
0x30830008
/dev/mem opened.
Memory mapped at address 0xffffb4c38000.
Read at address 0x30830008 (0xffffb4c38008): 0x0000010001F091F1

if all is fine,the ss (ce)line will negate at red point
how can i fix this