Quick question about the AD8031 in RGMII mode and it providing a 125MHz clock to the SOC. The AD8031 MDIO side works fine, but I can never get a good link status. I suspect it might be clock management. By default the driver selects an external 125MHz clock from the AR8031, seen in setting up the SOC clocks and poking the AR8031 registers. On my custom board I never see the 125MHz clock exiting the AR8031 ( I can get the AR8031 default 25MHz clock if I tweak the code ). Question is, is this clock there all the time or only produced once the link is up and the AD8031 can derive it off the LAN?
SOLVED! Turns out the board was missing the 2.37K bias resistor. Once this was fitted the internal AR8031 auto-negotiation worked. Immediately after that my 125MHz derived clock appeared. The documentation alludes to the 125MHz clock being derived off/or referenced to line timings, this appears to be correct as the 125MHz clock only appears once the link is up.
SOLVED! Turns out the board was missing the 2.37K bias resistor. Once this was fitted the internal AR8031 auto-negotiation worked. Immediately after that my 125MHz derived clock appeared. The documentation alludes to the 125MHz clock being derived off/or referenced to line timings, this appears to be correct as the 125MHz clock only appears once the link is up.
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Something's odd then. I can program teh AR8031 for 25Mz output but any other frequency nothing. The AR8031 documentation hints at the 125MHz is only produced from the line side sync pulses.
