imx7 UART prints garbage during boot before M4 is loaded.

[mhanuel]

Hi,

I have a pico imx7 board, normally cortex M4 debug console is on UART 6 defined in dts as 

pinctrl_uart6: uart6grp {
fsl,pins = <
MX7D_PAD_EPDC_DATA08__UART6_DCE_RX 0x79
MX7D_PAD_EPDC_DATA09__UART6_DCE_TX 0x79
MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS 0x79
MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS 0x79
>;
};

&uart6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart6>;
assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
fsl,uart-has-rtscts;
status = "okay";
};

I have change the debug console to UART 2,  for this I have disable the LCD so I can use UART 2 function on some of the LCD pads, I have done this by adding to m4 dts the following

&lcdif {
status = "disabled";
};

In M4  I have include code for initialize UART 2 as debug console instead of UART6

IOMUXC_SW_MUX_CTL_PAD_LCD_CLK = IOMUXC_SW_MUX_CTL_PAD_LCD_CLK_MUX_MODE(4);
IOMUXC_SW_MUX_CTL_PAD_LCD_ENABLE = IOMUXC_SW_MUX_CTL_PAD_LCD_ENABLE_MUX_MODE(4);
IOMUXC_SW_MUX_CTL_PAD_LCD_HSYNC = IOMUXC_SW_MUX_CTL_PAD_LCD_HSYNC_MUX_MODE(4);
IOMUXC_SW_MUX_CTL_PAD_LCD_VSYNC = IOMUXC_SW_MUX_CTL_PAD_LCD_VSYNC_MUX_MODE(4);

IOMUXC_SW_PAD_CTL_PAD_LCD_CLK = IOMUXC_SW_PAD_CTL_PAD_LCD_CLK_PE_MASK |
IOMUXC_SW_PAD_CTL_PAD_LCD_CLK_PS(3) |
IOMUXC_SW_PAD_CTL_PAD_LCD_CLK_HYS_MASK |
IOMUXC_SW_PAD_CTL_PAD_LCD_CLK_DSE(1);

IOMUXC_SW_PAD_CTL_PAD_LCD_ENABLE = IOMUXC_SW_PAD_CTL_PAD_LCD_ENABLE_PE_MASK |
IOMUXC_SW_PAD_CTL_PAD_LCD_ENABLE_PS(3) |
IOMUXC_SW_PAD_CTL_PAD_LCD_ENABLE_HYS_MASK |
IOMUXC_SW_PAD_CTL_PAD_LCD_ENABLE_DSE(1);

IOMUXC_SW_PAD_CTL_PAD_LCD_HSYNC = IOMUXC_SW_PAD_CTL_PAD_LCD_HSYNC_PE_MASK |
IOMUXC_SW_PAD_CTL_PAD_LCD_HSYNC_PS(3) |
IOMUXC_SW_PAD_CTL_PAD_LCD_HSYNC_HYS_MASK |
IOMUXC_SW_PAD_CTL_PAD_LCD_HSYNC_DSE(1);

IOMUXC_SW_PAD_CTL_PAD_LCD_VSYNC = IOMUXC_SW_PAD_CTL_PAD_LCD_VSYNC_PE_MASK |
IOMUXC_SW_PAD_CTL_PAD_LCD_VSYNC_PS(3) |
IOMUXC_SW_PAD_CTL_PAD_LCD_VSYNC_HYS_MASK |
IOMUXC_SW_PAD_CTL_PAD_LCD_VSYNC_DSE(1);

IOMUXC_UART2_RX_DATA_SELECT_INPUT = IOMUXC_UART2_RX_DATA_SELECT_INPUT_DAISY(0); // LCD_HSYNC Mode: ALT4 for UART2_RTS_B

It works, but  there is a moment during boot that the output become undefined and start printing garbage until M4 is loaded in memory and init the uart port, after that everything works, for example

wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww�
Hardware initialized UART2

This was not happening with uart6. 

How can I fix this in software? 

[max_merchel]

Seems to be the same problem as i.MX7 M4 UART change the speed during linux booting

[mhanuel]

Hi Igor,

Thanks for the advice,

Unfortunately it didn't work, here is what I did.

I set in u-boot the mmcargs variable as this

mmcargs=setenv bootargs uart_from_osc console=${console},${baudrate} root=${mmcroot}

same result, until the M4 is not loading I got printing garbage forever.

Do I missing something here? The only difference I notice between UART2 and UART6 is that UART6 is always defined , i.e. defined in imx7d.dts file but disable there such as,

uart6: serial@30a80000 {
	compatible = "fsl,imx7d-uart",
	"fsl,imx6q-uart", "fsl,imx21-uart";
	reg = <0x30a80000 0x10000>;
	interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&clks IMX7D_UART6_ROOT_CLK>,
	<&clks IMX7D_UART6_ROOT_CLK>;
	clock-names = "ipg", "per";
	dmas = <&sdma 32 4 0>, <&sdma 33 4 0>;
	dma-names = "rx", "tx";
	status = "disabled";
	};

Then under pico dts (imx7d-pico.dts) enable it

&uart6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart6>;
assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
fsl,uart-has-rtscts;
status = "okay";
};

And the final M4 dts loaded (imx7d-pico_hobbit-m4.dts) disable it.

&uart6 {
status = "disabled";
};

For my UART2 case similar thing happen but with LCD interface and UART2 never appear in DTS since it will be use by M4 only.

Will appreciate your comments, 

[igorpadykov]

Hi Manuel

one can try on nxp i.MX7D Sabre board with Demo Images on

i.MX Software|NXP 

Issues with pico imx7 board can be posted on its vendor forum or meta-fsl-arm mailing list
https://lists.yoctoproject.org/listinfo/meta-freescale

Best regards
igor

[igorpadykov]

Hi Manuel

one can try uart_from_osc kernel boot parameter described

in Table 11. Common kernel boot parameters attached Release Notes.

Best regards
igor
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