Hello,
I'm currently trying to read a quad spi flash (mt25ql128) in linux (kernel 4.1.15) with imx6ul chip. However, it seems only the pin used for 1-bit width is flipping properly.
Below are relevant parts from my device tree:
pinctrl_qspi: qspigrp { fsl,pins = < MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x00007088 MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x00007088 MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x00007088 MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x00007088 MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x00007088 MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x00007088 >; };
&qspi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_qspi>; status = "okay"; flash0: mt25ql128ab@0 { #address-cells = <1>; #size-cells = <1>; compatible = "micron,n25q128a13", "jedec,spi-nor"; /*spi-tx-bus-width = <4>;*/ spi-rx-bus-width = <4>; spi-max-frequency = <10000000>; reg = <0>; partition@0x00000000 { label = "parta"; reg = <0x00000000 0xC0000>; }; partition@0x000C0000 { label = "partb"; reg = <0x000C0000 0x0>; }; }; };
Dmesg appears to show the flash being detected successfully, but when I read from the device, only bit 1 is switching properly. All other bits (0, 2, 3) appear to be constant low. This results in values such as 0xFF being read as 0x22, or 0x12 as 0x02 (I believe.)
fsl-quadspi 21e0000.qspi: n25q128a13 (16384 Kbytes) 2 ofpart partitions found on MTD device 21e0000.qspi Creating 2 MTD partitions on "21e0000.qspi": 0x000000000000-0x0000000c0000 : "parta" 0x0000000c0000-0x000001000000 : "partb" Any help would be appreciated, thanks!
解決済! 解決策の投稿を見る。
Hello,
Just an update, I found this posting from Marcus saying the controller is left in DDR mode if booting from qspi, which is also my case.
https://community.nxp.com/thread/429073
I had to reconfigure everything for DDR and now it works.
Thanks for your time.
Hi Keith
one can try with nxp bsp releases and use imx6ul-14x14-evk.dts:
http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/arch/arm/boot/dts/imx6ul-14x14-evk.dts?...
documentation in fsl-quadspi.txt:
http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/Documentation/devicetree/bindings/mtd/f...
Best regards
igor
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Hello,
Just an update, I found this posting from Marcus saying the controller is left in DDR mode if booting from qspi, which is also my case.
https://community.nxp.com/thread/429073
I had to reconfigure everything for DDR and now it works.
Thanks for your time.