imx6ul: which are the dma values for the uart1?

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imx6ul: which are the dma values for the uart1?

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ihermida
Contributor II

In the file arch/arm/boot/dts/imx6ul.dtsi I am missing the "dmas" values for the uart1.

This uart1 does support DMA (according to CPU HRM), so I image it is just missing because it is the console uart in the EVK board (console does not use DMA).

The other uarts (2, 3, 4, ...) has defined those values.

Can anyone point me to the values for the DMA of that uart?

I think I have figure out those values, but I would like to get a confirmation to ensure they are correct

diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index cdcda7f739f9..a4452c269f9e 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -324,20 +324,22 @@
};

uart1: serial@02020000 {
compatible = "fsl,imx6ul-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02020000 0x4000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6UL_CLK_UART1_IPG>,
<&clks IMX6UL_CLK_UART1_SERIAL>;
clock-names = "ipg", "per";
+ dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
+ dma-names = "rx", "tx";
status = "disabled";
};

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2,487件の閲覧回数
igorpadykov
NXP Employee
NXP Employee

Hi Isaac

please check Table 3-2. SDMA event mapping i.MX6UL Reference Manual

http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6ULRM.pdf

Best regards
igor

2,486件の閲覧回数
ihermida
Contributor II

Thank you Igor. I was unable to find it when I was looking into the it, seems that I passed over it without realizing. 25 and 26 are the correct ones for the UART1

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fabio_estevam
NXP Employee
NXP Employee

Yes, it looks correct.