imx6ul and LAN8720, when set the PHY speed from 10M to 100M, PHY change to unlink and never back to link state

[laizhefeng]

Hi, guys,

Ethernet problem again!

When I used ethtool to change the net speed from 10M to 100M, the PHY state changed to unlink state and never goes back to link sate.

Below is the result after some tests.

1. when in unlink state, switch to aoto-negotiation will fix this problem, phy state change to link again

2. can not fix this problem by down/up eth0

3. change speed from 100M to 10M is fine

4. when I said "never back to link state", it is a little mistake, sometimes it did go back to link state after a long long long time.

I try to fix it by the patch at this link, but it won't help.

Re: Problem with "swinging" ethernet link on i.MX28 based device 

PS: I fixed the "swinging" problem by used the new LAN8720 driver(from kernel 4.9.9, drivers/net/phy/smsc.c, the kernel I used now is 4.1.15)

[Yuri]

Hello,

   Can You try mii-tool ?

Regards,

Yuri.

[laizhefeng]

Hi, Yuri,

Indeed, I did not used that "ethtool" tool to change the speed, but used the API ioctl(SIOCETHTOOL), sorry for not make it clear.

The old methord is:

case ETH_10MHD:

                        eth_cmd.speed=SPEED_10;

                        eth_cmd.speed_hi = 0;

                        eth_cmd.duplex = DUPLEX_HALF;

                        eth_cmd.autoneg = AUTONEG_DISABLE;

This will failed because the PHY did not go into link state.

I try to change the eth speed by setup the "advertising" member of "struct ethtool_cmd" as below, and enable the auto-negotiation, the speed will change as I expected.

case ETH_10MHD:

                     eth_cmd.autoneg = AUTONEG_ENABLE;

                     eth_cmd.advertising = eth_cmd.supported & SUPPORTED_10baseT_Half;

I guess it is none of the business of the tool, not even the ethernet controller, it is only the problem of the PHY(LAN8720A).

In the sepcification of LAN8720A, I found this description of link state changed, but it did not mean too much to me.

3.8.7 Link Integrity Test
The device performs the link integrity test as outlined in the IEEE 802.3u (Clause 24-15) Link Monitor
state diagram. The link status is multiplexed with the 10Mbps link status to form the Link Status bit in
the Basic Status Register and to drive the LINK LED (LED1).
The DSP indicates a valid MLT-3 waveform present on the RXP and RXN signals as defined by the
ANSI X3.263 TP-PMD standard, to the Link Monitor state-machine, using the internal DATA_VALID
signal. When DATA_VALID is asserted, the control logic moves into a Link-Ready state and waits for
an enable from the auto-negotiation block. When received, the Link-Up state is entered, and the
Transmit and Receive logic blocks become active. Should auto-negotiation be disabled, the link
integrity logic moves immediately to the Link-Up state when the DATA_VALID is asserted.
To allow the line to stabilize, the link integrity logic will wait a minimum of 330 μsec from the time
DATA_VALID is asserted until the Link-Ready state is entered. Should the DATA_VALID input be
negated at any time, this logic will immediately negate the Link signal and enter the Link-Down state.
When the 10/100 digital block is in 10BASE-T mode, the link status is derived from the 10BASE-T
receiver logic.

[Yuri]

Hello,

  perhaps it makes sense to consult with PHY manufacturer. 

Regards,

Yuri.