imx6sololite endian problem

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imx6sololite endian problem

Contributor II


   My customer has a problem when using imx6sololite.They use IMX6_Platform_SDK, and the OS is eCOS.

   The problem is: The system is OK in redboot, didn't find any problem each function,but when it needs to jump to applicaiton code, found that the order of the data byte reverses when

CPU load data from memory. When use GDB server in redboot to trace the applicaiton code, I found that bit9 of CPSR register will be set to big endian(1) as long as application data run only one assembly code. It has been confirmed that bit9 is 0 when running no application code(that is little endian).That means data fetched from memory by using assmeble code like "ldr r0, .init_flag"  are all big endian.

    When working mode transfer to system mode from suv mode, the problem still there. And GDB server can't run on system mode.

    Using "setend le" command in redboot in order to set the working mode of CPU to little endian, it doesn't work.

    The problem appears in several prototypes,

    Does anyone know how to fix this problem?

    By the way, I think below questions may help to solve the probem:

    1. What is the cortex A9 chip version of IMX6SOLOLITE,like R2P2 or R3P0?

      2. What kinds of process will bring big endian to little endian? Maybe I can check one by one.

     Really need help!


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NXP TechSupport
NXP TechSupport

Generally, the i.MX6 series platforms support little endian mode only. Also, FSL/NXP does not support eCOS OS BSP for its processors. So, you have to check all system processes one by one and not allow any of them to switch the core to the big endian mode.

The ARM Cortex A9 core version of i.MX6 series processors is r2p10-0rel0.

Have a great day,

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