sometimes, my imx6q board gets timeout when waiting for flip irq with rate 10~20%.
mxc_ipuv3_fb.c:
it seems there's not irq to do complete. and then it wait_for_completion_timeout.
hwcomposer/hwc_vsync.cpp
FBIO_WAITFORVSYNC error: time expire
i try as below, the issue also come out sometime. could u tell me why or some advice. thx.
1) Wait longer: wait_for_completion_timeout(&mxc_fbi->flip_complete, 4*HZ);
2) ldb_data = {
.ipu_id = 1, # or use ipu 0
.disp_id = 0,
.ext_ref = 1,
.mode = LDB_SIN0,
}
or
ldb_data = {
.ipu_id = 1,
.disp_id = 0,
.ext_ref = 1,
.mode = LDB_SEP0,
.sec_ipu_id = 1,
.sec_disp_id =1,
}
3) fb_data = {
{ /*fb0*/
.disp_dev = "ldb",
.interface_pix_fmt = IPU_PIX_FMT_RGB666,
.mode_str = "LDB-XGA",
.default_bpp = 16,
.int_clk = false,
.late_init = true, # or false
},
}
4)
ipu_data[] = {
{
.rev = 4,
.csi_clk[0] = "clko_clk",
.bypass_reset = false,
}, {
.rev = 4,
.csi_clk[0] = "clko_clk",
.bypass_reset = false,
},
};
Solved! Go to Solution.
Dear Freescale sir,
Any update or solution for this issue?
I met exactly the same issue on iMX6q board, light LVDS only. plat_data->bypass_reset is false.
My kernel log has following lines,
imx6qvab820 user.info kernel: imx-ipuv3 2400000.ipu: IPU DMFC ONLY-DP HIGH RESOLUTION: 5B(0~3), 5F(4~7)
imx6qvab820 user.info kernel: imx-ipuv3 2800000.ipu: IPU DMFC ONLY-DP HIGH RESOLUTION: 5B(0~3), 5F(4~7)
it will keep printing after system bootup, the LVDS is black.
user.err kernel: mxc_sdc_fb fb.24: timeout when waiting for flip irq
BRs
James
Hi James ,
I met this same issue,you have solve this issue later? Have any advices?
Thanks,
I got one email from paul_tian@fic.com.tw, the issue can't be reproduced if disable HWComposer by go to settings > developer options > check disable HW overlay.
Could you help further narrow down the issue follow below step?
1. Disable FSL hwcomposer by "mv /system/lib/hw/hwcomposer_fsl.imx6.so /system/lib/hw/hwcomposer_fsl.imx6.so.bak", the reboot board and test if the issue still happen or not.
2. If the issue still here after step 1, then disable Vivante hwcomposer by "mv /system/lib/hw/hwcomposer_viv.imx6.so /system/lib/hw/hwcomposer_viv.imx6.so.bak", reboot board and test if the issue still happen or not.
Dear Sir,
We met the same question.
Do you have any idea for this issue?
Any point need to check?
hi, Mosee
i had a try to change the frame rate(timing) and resolution.
but haven't solved this issue .
Thanks,
peter
From my point, some wrong IPU setting can cause the SYNC display error, then there will be "timeout when waiting for flip irq" error, but if you only modified the timing parameters for display mode, the test result should be same as original BSP.
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- imx6q mxc_sdc_fb timeout when waiting for flip irq" sent on 06/20/2014
7:38:12 AM.
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hi, Qiang Li
as you said, i decreased the frame rate, but it does not work.
do you have the other method to fix it or what's root cause for the issue?
peter
Hi Mosee,
I met this same issue,.you have solve this issue later? Have any advices?
Thanks,
Leo