The most likely cause of the issue is some inappropriate design of the DDR memory interface, causing it to hang when switching to higher operational frequency. Please check your DDR interface design according to the Sections 3.1 to 3.6 of the i.MX6 series Hardware Development Guide document, available on the processor's Documentation web page:
http://www.nxp.com/products/automotive-products/microcontrollers-and-processors/arm-mcus-and-mpus/i....
Pay the special attention to the traces impedance matching as per the Section 3.3 and trace length matching as per the Section 3.4.
Also, check the set points of the VDD_ARM_CAP, VDD_SOC_CAP and VDD_PU_CAP power rails, they should be between 1.25V and 1.3V for 1.2GHz operatin
Have a great day,
Artur
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