We are use a iMX6Quad CPU on one of our custom board. We are running Linux 4.19.25. We are having performance issue on the EIM bus. Our bus clock is 132MHz and the core clock is at 996MHz. The EIM bus width is 16 bits. With this configuration our access of a 16/32 data on this port is slow. A 16 bit access takes 350 nano seconds. We see this issue only while accessing through virtual memory from a user space. We have setup the EIM registers correctly as we can assess the data faster from a physical address in u-boot. But with the virtual address access it adds a ~250nanoseconds delay. Is this expected delay from the MMU for address translation? I have captured the Chip select signal on the scope. For a 32 bit access from cpu, the two 16 bit access is fast. But a two 16 bit access from the CPU is slow and is spaced 250 nanoseconds apart. I have attached the cs signal for two 16 bit cpu access and two 32 bit cpu access.
Hi Rajesh
> Is this expected delay from the MMU for address translation?
yes this can be in linux as in operating system (opposite to uboot) there are other masters
accessing concurrently system buses. In theory one can try to increase master priority (core0 for example)
using Table 45-5. QoS and tidemark parameters i.MX 6Dual/6Quad Applications Processor Reference Manual
Best regards
igor
But we do not see this problem on the Same board running RTOS like eCos. Linux is configuring something different and causing this issue.
usual linux is not RTOS, so there may be bigger delays. One can try for example special version of linux
Best regards
igor
We are using the Prempt RT patch in the kernel. We have also tried this on a Linux with Xenomai co kernel and running the test in xenomai task. If the user task was getting preempted, we will not see this delay for every access across 100 consecutive access. I have attached the Chip Select timing of a 16 bit access while running from an RTOS on the same board. Something is Linux is configured differently.
>Something is Linux is configured differently.
additional details were sent via mail. Also may be helpful
https://community.nxp.com/t5/i-MX-Processors/imx6-How-to-make-GPIO-toggle-faster/m-p/309313
Best regards
igor