imx6q（E9_V3开发板）支持lvds屏显示异常

[dason_cc]

hi all,

硬件平台：TQ E9_V3开发板

Linux version： 4.1.15

我现在使用i.mx6q的LVDS0接口来驱动9.46inch LVDS接口的LCD，24bit。

现象：静态界面显示色彩不对，播放视频时还会闪屏并出去其他杂色（见图片）

uboot command：

=> printenv mxcfb0
mxcfb0=video=mxcfb0:dev=ldb,1280x240@60,if=RGB24,bpp=32

kernel dts & dtsi

E9-sabresd.dts:

&ldb {
   lvds-channel@0 {
   crtc = "ipu2-di0";
   };

   lvds-channel@1 {
   crtc = "ipu2-di1";
   };
};

e9qdl-sabresd.dtsi:

mxcfb1: fb@0 {
   compatible = "fsl,mxc_sdc_fb";
   disp_dev = "ldb";
   interface_pix_fmt = "RGB24";
   default_bpp = <32>;
   int_clk = <0>;
   late_init = <0>;
   status = "okay";
};

&ldb {
status = "okay";
dual-mode = <0>;

   lvds-channel@0 {
   fsl,data-mapping = "spwg";
   fsl,data-width = <24>;
   status = "okay";

   display-timings {
   native-mode = <&timing0>;
   timing0: hsd100pxn1 {
   clock-frequency = <27700000>;
   hactive = <1280>;
   vactive = <240>;
   hback-porch = <10>;
   hfront-porch = <74>;
   vback-porch = <82>;
   vfront-porch = <16>;
   hsync-len = <2>;
   vsync-len = <2>;
   };
};

图片、屏规书、原理图见附件！

已经在lvds显示异常这道坎上卡了一段时间，求大神解救，多谢！

[weidong_sun]

Hi Dason,

      请arch/arm/mach-imx路径中i.mx6q clock的C源文件中，把LVDS时钟souce clock调整为PLL5，然后再试试是否有改善。

Have a nice day!

TIC Weidong Sun

[dason_cc]

HI Wigros Sun,

   修改ldb的时钟后现象：图片仍然是显示异常，但是给屏的时钟正常了（原先都是38Mhz，现在为正常的27.7Mhz了，道理同该blog：

imx6 适配DLP（864*480）输出 - u013111562的博客 - CSDN博客 ）

   我修改的是linux dts：

   &clks {
   fsl,ldb-di0-parent = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
   fsl,ldb-di1-parent = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
   //fsl,ldb-di0-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
   //fsl,ldb-di1-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
   }

clk-imx6q.c跟踪：

/*
* Read the LDBID[0/1] parents from the device tree.
* If no entry is found in the device tree, the default
* parent will be set to IMX6QDL_CLK_PLL2_PFD0_352M
*/
static void of_assigned_ldb_sels(struct device_node *node,
int *ldb_di0_sel, int *ldb_di1_sel)
{
      struct of_phandle_args clkspec;
      int index = 0, rc;

      rc = of_parse_phandle_with_args(node, "fsl,ldb-di0-parent",
            "#clock-cells", index, &clkspec);
      printk("clock-debug ************* rc:%d\n", rc);
      if (rc < 0) {
      /* skip empty (null) phandles */
      if (rc != -ENOENT)
            *ldb_di0_sel = IMX6QDL_CLK_PLL2_PFD0_352M;
      } else {
            *ldb_di0_sel = ldb_di_sel_by_clock_id(clkspec.args[0]);
      printk("clock-debug **************** clkspec.args[0]:%d\n", clkspec.args[0]);
      if (*ldb_di0_sel == -ENOENT){
            printk("clock-debug **************** pll2\n");
      *ldb_di0_sel = IMX6QDL_CLK_PLL2_PFD0_352M;
}

...........
}

打印log：

[ 0.000000] clock-debug ************* rc:0

[ 0.000000] clock-debug **************** clkspec.args[0]:195

imx6qdl-clock.h:

...

#define IMX6QDL_CLK_PLL5_POST_DIV 194
#define IMX6QDL_CLK_PLL5_VIDEO_DIV 195
#define IMX6QDL_CLK_EIM_SLOW 196

....

问：如果我设置是正确的，并且不是这个原因导致的显示异常，那么还有什么方法可以排查解决这个问题呢？

--------------------

havd a nice day

CC dason